Drain avalanche hot carrier injection
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2013 IEEE International Integrated Reliability Workshop (IIRW)
We invite you to submit a presentation proposal that addresses any semiconductor related reliability issue, including the following topics: resistive memories, high-k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, III-V, SOI, emerging memory technologies, transistor reliability including hot carriers and NBTI/PBTI, root cause defects (physical mechanisms and simulations), Cu interconnects and low-k dielectrics, impact of transistor degradation on circuit reliability, designing-in reliability (products, circuits,systems, processes), customer product reliability requirements / manufacturer reliability tasks, waferlevel reliability tests (test approaches and reliability test structures), reliability modeling and simulation,optoelectronics, and single event upsets.
Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...
Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Bobrow, D.G.; Wegbreit, B. Computers, IEEE Transactions on, 1976
Newer programming languages for artificial intelligence extend the class of available control regimes beyond simple hierarchical control. In so doing, a key issue is using a model that clearly exhibits the relation between modules, processes, access environments, and control environments. This paper presents a model which is applicable to diverse languages and presents a set of control primitives which provide ...
Automatic Control, IEEE Transactions on, 1972
We provide a general theorem concerning situations in which the teachability set of a group machine is a group.
Kuan-Kin Chan; Felsen, L.B. Antennas and Propagation, IEEE Transactions on, 1977
New representations for the time-dependent scalar Green's functions for a perfectly conducting semi-infinite cone are derived. When the cone angle is small and the source is located on the cone axis, the solutions for all observation times can be expressed in remarkably simple closed forms involving only elementary functions. New elementary time-harmonic Green's function approximations, valid for all frequencies, are ...
Miura, N.; Hayashi, H.; Komatsubara, H.; Mochizuki, M.; Fukuda, K. Simulation of Semiconductor Processes and Devices, 2002. SISPAD 2002. International Conference on, 2002
We present a TCAD driven hot carrier reduction methodology of 3.3V I/O p-MOSFETs design. The drain structures are successfully optimized in short time by applications of TCAD local models. Considering tradeoffs between hot carrier injection (HCI) and ION, HALO/SDE of both core and I/O transistors can be totally optimized for photo-mask reduction.
Toyota, Y.; Matsumura, M.; Hatano, Mutsuko; Shiba, T.; Ohkura, M. Electron Devices, IEEE Transactions on, 2010
The degradation characteristics of n- and p-channel polysilicon thin-film transistors (TFTs) under circuit operation were investigated by using CMOS inverter circuits consisting of n-channel TFTs with a lightly doped drain (LDD) structure and p-channel TFTs with a single-drain (SD) structure. A new test element made it possible to separately evaluate the degradation characteristics of each type of TFT during CMOS ...
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