IEEE Organizations related to Drain avalanche hot carrier injection

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Conferences related to Drain avalanche hot carrier injection

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2017 17th Non-Volatile Memory Technology Symposium (NVMTS)

The NVMTS is an eminent forum for exchanging information on state-of-the-art technological advances on non-volatile memory among researchers and engineers from both academia and industry. NVMTS 2017 focuses on both emerging and existing non-volatile memory technologies instead of a singular technology, so as to encourage cross-pollination of ideas. We aim to create an interactive environment for discussing various significant aspects of advanced memory technologies.


2017 29th International Symposium on Power Semiconductor Devices and IC's (ISPSD)

ISPSD is the premier forum for technical discussion in all areas of power semiconductor devices and power integrated circuits.


2017 IEEE International Integrated Reliability Workshop (IIRW)

The IEEE International Integrated Reliability Workshop (IIRW) focuses on ensuring electronic device reliability through fabrication, design, testing, characterization, and simulation, as well as identification of the defects and physical mechanisms responsible for reliability problems. Topics include: resistive memories, high-k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, III-V, SOI, emerging memory technologies, transistor reliability including hot carriers and NBTI/PBTI, root cause defects (physical mechanisms and simulations), Cu interconnects and low-k dielectrics, impact of transistor degradation on circuit reliability, MEMS and sensor reliability, designing-in reliability (products, circuits, systems, processes), customer product reliability requirements / manufacturer reliability tasks, wafer level reliability tests (test approaches and reliability test structures), reliability modeling and simulation, optoelectronics, and single event upsets.


2017 SC - International Conference for High Performance Computing, Networking, Storage and Analysis

SC has been at the forefront in gathering the best and brightest minds in supercomputingtogether, with our unparalleled technical papers, tutorials, posters, and speakers. SC 2016 willtake a major step forward not only in supercomputing, but in super-conferencing, witheverything designed to make the 2016 conference the most you friendly conference in theworld. We are streamlining conference information and moving to a virtual real-time method ofdetermining technical program thrusts. No more pre-determined technical themes picked far inadvance. Through social media, data mining, and active polling, we'll see which technicalinterests and issues emerge throughout the year, and focus on the ones that interest you themost.


ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC)

European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in silicon technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers, and system designers

  • ESSDERC 2016 - 46th European Solid-State Device Research Conference

    The aim of ESSDERC and ESSCIRC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in silicon technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers, and system designers. While keeping separate Technical Program Committees, ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.

  • ESSDERC 2015 - 45th European Solid-State Device Research Conference

    The ESSDERC conference is collocated with the ESSCIRC conference at the same time. The aim of ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in silicon technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers, and system designers. While keeping separate Technical Program Committees, ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.

  • ESSDERC 2014 - 44th European Solid State Device Research Conference

    The aim of ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in silicon technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers, and system designers. While keeping separate Technical Program Committees, ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.

  • ESSDERC 2013 - 43rd European Solid State Device Research Conference

    The ESSDERC conference provides an annual European forum for the presentation and discussion of recent advances in solid-state devices and process technology. The conference is organized jointly with ESSCIRC (18606), which covers advances in circuit technology.

  • ESSDERC 2012 - 42nd European Solid State Device Research Conference

    The aim of the ESSDERC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices.

  • ESSDERC 2011 - 41st European Solid State Device Research Conference

    The aim of the ESSDERC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. ESSDERC and its sister conference ESSCIRC, which deals with solid-state circuits, are jointly organised.

  • ESSDERC 2010 - 40th European Solid State Device Research Conference

    The aim of the ESSDERC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. ESSDERC 2010 wll the 40th even of this series of conferences which has been running under the technical sponsorship of IEEE.

  • ESSDERC 2009 - 39th European Solid State Device Research Conference

    The aim of the ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. The aim of the ESSCIRC is to provide corresponding forum in the field of silicon design and implementation.

  • ESSDERC 2008 - 38th European Solid State Device Research Conference

    The aim of the ESSDERC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. ESSDERC and its sister conference ESSCIRC, which focuses on solid-state circuits, share a single Steering Committee, and are held together to enable both communities to share advances in the technologies and design which enable increasing levels of sophistication and performance in integrated systems.

  • ESSDERC 2007 - 2007 37th European Solid State Device Research Conference

  • ESSDERC 2006 - 2006 36th European Solid State Device Research Conference

  • ESSDERC 2005 - 2005 35th European Solid State Device Research Conference

  • ESSDERC 2004 - 2004 34th European Solid State Device Research Conference

  • ESSDERC 2003 - 2003 33rd European Solid State Device Research Conference



Periodicals related to Drain avalanche hot carrier injection

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Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Automatic Control, IEEE Transactions on

The theory, design and application of Control Systems. It shall encompass components, and the integration of these components, as are necessary for the construction of such systems. The word `systems' as used herein shall be interpreted to include physical, biological, organizational and other entities and combinations thereof, which can be represented through a mathematical symbolism. The Field of Interest: shall ...


Communications, IEEE Transactions on

Telephone, telegraphy, facsimile, and point-to-point television, by electromagnetic propagation, including radio; wire; aerial, underground, coaxial, and submarine cables; waveguides, communication satellites, and lasers; in marine, aeronautical, space and fixed station services; repeaters, radio relaying, signal storage, and regeneration; telecommunication error detection and correction; multiplexing and carrier techniques; communication switching systems; data communications; and communication theory. In addition to the above, ...


Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...


Device and Materials Reliability, IEEE Transactions on

Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...


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Most published Xplore authors for Drain avalanche hot carrier injection

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Xplore Articles related to Drain avalanche hot carrier injection

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A Model for Predicting On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Polysilicon Thin-Film Transistors

Tetsufumi Kawamura; Mieko Matsumura; Takuo Kaitoh; Takeshi Noda; Mutsuko Hatano; Toshio Miyazawa; Makoto Ohkura IEEE Transactions on Electron Devices, 2009

A model for predicting on-current degradation caused by drain-avalanche hot carriers in NMOS low-temperature polysilicon thin-film transistors (TFTs) is described. The amount of trapped charge caused by hot-carrier stress was estimated by using a model describing the lightly doped drain region as an imaginary TFT, and it was found that the amount of trapped charge saturates as voltage-stress time passes. ...


Device performance degradation to hot-carrier injection at energies below the Si-SiO<inf>2</inf>energy barrier

E. Takeda; N. Suzuki; T. Hagiwara 1983 International Electron Devices Meeting, 1983

Device performance degradation due to hot-carriers having energies below the Si-SiO2energy barrier are examined. For a test device with Leff= 0.3 µm and Tox5 nm, transconductance degradation and/or threshold voltage shift have been detected at a drain voltage of 2.5 V, which is lower than the Si-SiO2energy barrier(∼ 3.2 eV). In particular, transconductance degradation, rather than threshold voltage shift, is ...


Hot Carrier Degradation Mechanism Under Pulsed Stress in Mosfets

R. Nagai; K. Umeda; E. Takeda 1991 Symposium on VLSI Technology, 1991

First Page of the Article ![](/xploreAssets/images/absImages/00705967.png)


A Model of Human Decisionmaking in Fault Diagnosis Tasks That Include Feedback and Redundancy

IEEE Transactions on Systems, Man, and Cybernetics, 1979

None


A convergence scheme for over-erased flash EEPROM's using substrate-bias-enhanced hot electron injection

C. -Y. Hu; D. L. Kencke; S. K. Banerjee; R. Richart; B. Bandyopadhyay; B. Moore; E. Ibok; S. Garg IEEE Electron Device Letters, 1995

A novel convergence scheme using substrate-bias-enhanced hot electron injection is proposed to tighten the cell threshold voltage distribution after erasure for stacked gate flash EEPROM's. By lowering the drain voltage and increasing the magnitude of the negative substrate bias voltage, the substrate current is reduced but the hot electron gate current is enhanced significantly, and the convergence time is shown ...


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Educational Resources on Drain avalanche hot carrier injection

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eLearning

A Model for Predicting On-Current Degradation Caused by Drain-Avalanche Hot Carriers in Low-Temperature Polysilicon Thin-Film Transistors

Tetsufumi Kawamura; Mieko Matsumura; Takuo Kaitoh; Takeshi Noda; Mutsuko Hatano; Toshio Miyazawa; Makoto Ohkura IEEE Transactions on Electron Devices, 2009

A model for predicting on-current degradation caused by drain-avalanche hot carriers in NMOS low-temperature polysilicon thin-film transistors (TFTs) is described. The amount of trapped charge caused by hot-carrier stress was estimated by using a model describing the lightly doped drain region as an imaginary TFT, and it was found that the amount of trapped charge saturates as voltage-stress time passes. ...


Device performance degradation to hot-carrier injection at energies below the Si-SiO<inf>2</inf>energy barrier

E. Takeda; N. Suzuki; T. Hagiwara 1983 International Electron Devices Meeting, 1983

Device performance degradation due to hot-carriers having energies below the Si-SiO2energy barrier are examined. For a test device with Leff= 0.3 µm and Tox5 nm, transconductance degradation and/or threshold voltage shift have been detected at a drain voltage of 2.5 V, which is lower than the Si-SiO2energy barrier(∼ 3.2 eV). In particular, transconductance degradation, rather than threshold voltage shift, is ...


Hot Carrier Degradation Mechanism Under Pulsed Stress in Mosfets

R. Nagai; K. Umeda; E. Takeda 1991 Symposium on VLSI Technology, 1991

First Page of the Article ![](/xploreAssets/images/absImages/00705967.png)


A Model of Human Decisionmaking in Fault Diagnosis Tasks That Include Feedback and Redundancy

IEEE Transactions on Systems, Man, and Cybernetics, 1979

None


A convergence scheme for over-erased flash EEPROM's using substrate-bias-enhanced hot electron injection

C. -Y. Hu; D. L. Kencke; S. K. Banerjee; R. Richart; B. Bandyopadhyay; B. Moore; E. Ibok; S. Garg IEEE Electron Device Letters, 1995

A novel convergence scheme using substrate-bias-enhanced hot electron injection is proposed to tighten the cell threshold voltage distribution after erasure for stacked gate flash EEPROM's. By lowering the drain voltage and increasing the magnitude of the negative substrate bias voltage, the substrate current is reduced but the hot electron gate current is enhanced significantly, and the convergence time is shown ...


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