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2013 9th International Conference on Information, Communications & Signal Processing (ICICS)
The conference provides an opportunity for researchers around the world to exchange ideas and latest research results in areas such as multimedia systems, information systems, signal processing, communications, networking and related fields.
The design and manufacture of consumer electronics products, components, and related activities, particularly those used for entertainment, leisure, and educational purposes
This publication covers the theory, design, fabrication, manufacturing and application of information displays and aspects of display technology that emphasize the progress in device engineering, device design, materials, electronics, physics and reliabilityaspects of displays and the application of displays.
Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Theory and applications of industrial electronics and control instrumentation science and engineering, including microprocessor control systems, high-power controls, process control, programmable controllers, numerical and program control systems, flow meters, and identification systems.
The development and application of electric systems, apparatus, devices, and controls to the processes and equipment of industry and commerce; the promotion of safe, reliable, and economic installations; the encouragement of energy conservation; the creation of voluntary engineering standards and recommended practices.
Acoustics, Speech and Signal Processing, IEEE Transactions on, 1989
The intrinsic dimensionally (ID) of different sets of isolated word utterances is estimated through a method recently proposed by K.W. Pettis et al. (1979). This results show ID values ranging from 3 to 15, which are consistent with the intuitive degree of difficulty associated to the sets considered. Also, some speculative applications of ID estimating are discussed.<>
Bioengineering Conference, 2009 IEEE 35th Annual Northeast, 2009
Although recent advances in neuroscience, information technology and microelectronics have enabled implanting miniature and highly intelligent devices within the brain for in vitro diagnostic and therapeutic functions, novel signal processing methods are required for energy efficient data acquisition due to power constraints accompanying these miniature devices. We present a new method for signal acquisition in brain implants based on Asynchronous ...
Power and Energy Society General Meeting - Conversion and Delivery of Electrical Energy in the 21st Century, 2008 IEEE, 2008
This paper describes a methodology that was developed for the classification of medium voltage (MV) electricity customers. Starting from a sample of data bases, resulting from a monitoring campaign, data mining (DM) techniques are used in order to discover a set of a MV consumer typical load profile and, therefore, to extract knowledge regarding to the electric energy consumption patterns. ...
Proceedings of the IEEE, 1963
Summary form only. An abstract of the above-titled article, taken from the 1963 IEEE International Convention (held March 25-28, New York, NY, USA), is presented.
Control Conference, 2006. CCC 2006. Chinese, 2006
The pressure of gas-collecting pipe is the main technology parameter in the production of coke oven. At present, people have adopted the advanced strategy that combined fuzzy control and expert controlling together in lots of factories. Fuzzy rules are generally created based on experience conclusions. It is in the basic of experience. This paper applies data mining to intelligent control, ...
Ivica Stevanović; Stanislav Skibin 8th International Conference on Power Electronics - ECCE Asia, 2011
In this paper, a novel multi resonance SPICE compatible behavioral model and corresponding parameter extraction procedure for single- and three-phase chokes are presented. The model takes into account common-mode and differential-mode behavior of the choke and can be applied to modeling both common-mode chokes and coupled DC chokes. The model parameters are obtained from a straightforward parameter extraction procedure based ...
J. N. Bringuier; Raj Mittra Proceedings of the Fourth European Conference on Antennas and Propagation, 2010
This paper presents a novel technique using a hybrid FDTD method based on the dipole moment concept for applications relevant to BANs. The authors provide some numerical results for a pin fed patch and a small loop.
Ho Yoon San; S. M. R. Hasan TENCON '96. Proceedings., 1996 IEEE TENCON. Digital Signal Processing Applications, 1996
A high performance, low power second order sigma delta modulator is proposed. The proposed convertor can be integrated along with other digital circuits to form a complete monolithic digital signal processor for DSP applications. The convertor is not sensitive to component mismatch and nonidealities of the process technology. The simulation result shows that the proposed convertor achieved virtually 13.9 bit ...
Dries Vercaemer; Johan Raman; Pieter Rombouts IEEE Transactions on Circuits and Systems II: Express Briefs, 2016
This paper presents a power reduction technique for continuous time sigma delta modulators (CTSDM). The approach consists of two elements. First, a passive low pass filter is added in front of the modulator's loop filter to reduce the high frequency components in the loop. As a result, the slew rate requirements of the opamps can be greatly reduced which allows ...
S. Delisle 16th International Workshop on Database and Expert Systems Applications (DEXA'05), 2005
Despite a high level of activity and a large number of researchers involved, current research in data mining is plagued with several serious problems that should be regarded as top-priority challenges. First, large-scale, visible results and benefits seem rare. Second, the field has become utterly specialized and a lot of work remains to be done at the "big picture" level. ...
Requirements, applied to analog components and characteristics for oversampling A-to-D converter structures with second order loop transfer function, were analyzed through numerical and mathematical analyses. The results suggest that a first order predictive encoder, with first order noise shaping, is best suited to high resolution future VLSl implementation. It is most difficult to achieve a theoretical second order Â¿-Â¿ modulation signal- to-noise ratio, because of the amplifier performance requirements. The operational amplifier gain should only be greater than kR/n, as long as the amplifier response is linear, where R is the oversampling ratio, Â¿ is the angular stop band frequency and k is a. parameter depending on structures and integrator circuit configuration, if a switched capacitor integrator is employed in a noise shaping technology. A second order delta modulation coder does not seem to be applicable to a precision converter, but to a high speed converter instead.
This chapter contains sections titled: A Self-Calibrating 15 Bit CMOS A/D Converter A Ratio-Independent Algorithmic Analog-to-Digital Conversion Technique A Per-Channel A/D Converter Having 15-Segment Âµ-255 Companding A Use of Double Integration in Sigma Delta Modulation MOS ADC-Filter Combination That Does Not Require Precision Analog Components A Voiceband 15b Interpolative Converter Chip Set A 12-bit Sigma-Delta Analog-to-Digital Converter with a 15-MHz Clock Rate An 8-bit High-Speed CMOS A/D Converter An 8-MHz CMOS Subranging 8-Bit A/D Converter A Pipelined 5-Msample/s 9-bit Analog-to-Digital Converter
Decimation is an important component of oversampled analog-to-dlgital conversion. It transforms the digitally modulated signal from short words occurring at high sampling rate to longer words at the Nyquist rate. Here we are concerned with the initial stage of decimation, where the word rate decreases to about four times the Nyquist rate. We show that digital filters comprising cascades of integrate-and-dump functions can match the structure of the noise from sigma delta modulation to provide decimation with negligible loss of signal-to-noise ratio. Explicit formulas evaluate particular tradeoffs between modulation rate, signal-to-noise ratio, length of digital words, and complexity of the modulating and decimating functions.
This chapter discusses the operation of a three‐phase fully controlled bridge converter. It is shown that by suitable control, this device can be used to achieve either a three‐phase controllable voltage source or a three‐phase controllable current source. The chapter presents a refinement of six‐step operation. In particular, one of several pulse‐width modulation (PWM) control strategies that allows the amplitude of the fundamental component of the voltage to be readily controlled is discussed. Six‐step modulation, extended sine‐triangle modulation, and space‐vector modulation are all voltage‐source modulation schemes. The chapter explains usage of these schemes to develop an open‐loop voltage‐regulated converter. Hysteresis modulation and delta modulation are both current source‐based schemes. These are used as the basis of developing an open‐loop current‐regulated converter. Finally, the chapter focuses on closed‐loop methods of regulating q‐ and d‐axis voltages and currents.
An approach to the implementation of digital filters is presented that employs a small set of relatively simple digital circuits in a highly regular and modular configuration, well suited to LSI construction. Using parallel processing and serial, two's-complement arithmetic, the required arithmetic circuits (adders and multipliers ) are quite simple, as are the remaining circuits, which consist of shift registers for delay and small read-only memories for coefficient storage. The arithmetic circuits are readily multiplexed to process multiple data inputs or to effect multiple, but different, filters (or both), thus providing for efficient hardware utilization. Up to 100 filter sections can be multiplexed in audio-frequency applications using presently available digital circuits in the medium-speed range. The filters are also easily modified to realize a wide range of filter forms, transfer functions, multiplexing schemes, and round-off noise levels by changing only the contents of the read-only memory and/or the timing signals and the length of the shift-register delays. A simple analog-to-digital converter, which uses delta modulation as an intermediate encoding process is also presented for audio-frequency applications.
This chapter contains sections titled: Introduction The 3-Phase Bridge Converter 180Â° Voltage Source Operation Pulse-Width Modulation Sine-Triangle Modulation Third-Harmonic Injection Space-Vector Modulation Hysteresis Modulation Delta Modulation Open-Loop Voltage and Current Control Closed-Loop Voltage and Current Controls References Problems
A novel architecture design of a one stage FIR filter for decimation is described. It performs the decimation of a 1-bit code at 1024KHz of double integration Sigma Delta modulation output to PCM at 16KHz. This architecture is designed in such a way that it needs only a simple control structure suitable for VLSI implementation. We devised an algorithm for generating the coefficients of the filter with a minimum of required hardware. It does not require storing the coefficients in a ROM and continuously reading it to calculate the convolution. The accumulators needed to perform the direct convolution are arranged in a way that simplifies and minimizes the hardware required for the filter implementation. The filter response is Sinc3(f) which provides sufficient attenuation for modulation generated by means of double integration. The implementation of this filter requires the generation of the coefficients and the performance of the convolution. Three coefficients are needed with every input to obtain the output sequence. The major feature of this architecture is the use of an efficient algorithm to obtain the coefficients thereby reducing the area and power consumption. It is very suitable for VLSI implementation in CMOS technology.
Uniform qunntizers play a fundamental role in digital communication systems and have been the subject of extensive study for many decades, The inherent nonlinearity of quantizers makes their analysis hoth difficult and Interesting, It usually has been accomplished either by assuming the quantizer noise to be a signal-independent, uniform white random process or by replacing the quantizer by a deterministic linear device, or by combining the two assumptions. Such linearizing approximations simplify the analysis and permit the use of linear systems techniques, but few results exist quantifying how good such approximations are for specific systems, These complications are magnified when the quantizer is inside a feedback loop, as for Sigma-Delta modulators. Exact descriptions of the moments and spectra of quantizer noise have been developed recently for the special case of single-loop, multistage and multiloop Signul-Delta modulators. These results demonstrate. that the white noise and linearization assumptions can be quite poor approximations in some systems and quite good in others. It turns out that many of the techniques used in the analysis were first applied to the analysis of quantizers by Clavier, Panter, and Grieg (1947) in pioneering (but often overlooked) work that preceded Bennett's (1948) classic study of quantization noise spectra. We take advantage of the benefit of hindsight to develop several results describing the behavior of quantization noise in a unified and simplified manner. Exact formulas for quantizer noise spectra are developed and applied to a variety of systems and inputs, including scalar quantization (PCM), dithered PCM, Sigma-Delta modulation, dithered Sigma-Delta modulation, two-stage Sigma-Delta modulation, and second-order Sigma-Delta modulation.
Sigma delta modulation is viewed as a technique that employs integration and feedback to move quantization noise out of baseband. This technique may he iterated by placing feedback loop around feedback loop, but when three or more loops are used the circuit can latch into undesirable overloading modes. In the desired mode, a simple linear theory gives a good description of the modulation even when the quantization has only two levels. A modulator that employs double integration and two-level quantization is easy to implement and is tolerant of parameter variation. At sampling rates of 1 MHz it provides resolution equivalent to 16 bit PCM for voiceband signals. Digital filters that are suitable for converting the modulation to PCM are also described.
Oversampled sigma-delta modulation has been proposed as a practical implementation for high rate analog-to-digital conversion because of its simplicity and its robustness against circuit imperfections. To date, mathematical developments of the basic properties of such systems have been based either on simplified continuous-time approximate models or on linearized discrete-time models where the quantizer is replaced by an additive white uniform noise source. In this paper. we rigorously derive several basic properties of a simple discrete-time single integrator loop sigma-delta modulator with an accumulate-and-dump demodulator. The derivation does not require any assumptions on the correlation or distribution of the quantizer error, and hence involves no linearization of the nonlinear system, but it does show that when the input is constant, the state sequence of the integrator in the encoder loop can be modeled exactly as a linear system in an appropriate space. Two basic properties are developed: 1) the behavior of the sigma-delta quantizer when driven by a constant input and its relation to uniform quantization, and 2) the rate-distortion tradeoffs between the oversampling ratio and the average mean-squared quantization error.
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