Conferences related to DRAM chips

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2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2018 55th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.


2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)

Topics of interest include, but are not limited to:+Processor, cache, and memory architectures+Parallel computer architectures+Multicore architectures+Impact of technology on architecture+Power-efficient architectures and techniques+Dependable/secure architectures+High-performance I/O systems+Embedded and reconfigurable architectures+Interconnect and network interface architectures+Architectures for cloud-based HPC and data centers+Innovative hardware/software trade-offs+Impact of compilers and system software on architecture+Performance modeling and evaluation+Architectures for emerging technology and applications


2013 IEEE 24th International Conference on Application-specific Systems, Architectures and Processors (ASAP)

The conference will cover the theory and practice of application-specific systems, architectures and processors. The 2013 conference will build upon traditional strengths in areas such as arithmetic, cryptography, compression, signal and image processing, application-specific instruction processors, etc.

  • 2012 IEEE 23rd International Conference on Application-specific Systems, Architectures and Processors (ASAP)

    The conference will cover the theory and practice of application-specific systems, architectures and processors. The 2012 conference will build upon traditional strengths in areas such as arithmetic, cryptography, compression, signal and image processing, application-specific instruction processors, etc. We especially encourage submissions in the following three areas: Bioinformatics and computational biology - life sciences present a host of interesting problems that can benefit from application-specific solutions. Computational finance - the financial community has significant needs for high performance computing. Architecturally diverse systems - systems that use varied computing resources such as FPGAs, GPUs, Cell processors, etc.

  • 2010 21st IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)

    Application-specific systems: network computing, special-purpose systems, performance evaluation, design languages, compilers, operating systems, nanocomputing systems and applications, hardware/software integration and rapid prototyping. Application-specific architectures: special-purpose designs, design methodology, CAD tools, fault tolerance, specifications and interfaces, networks-on-a-chip, hardware/software co-design, processor arrays, SoC, superscalar, multithreaded, VLIW and EPIC architectures.

  • 2009 20th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP)

    The conference will cover the theory and practice of application-specific systems, architectures and processors. Areas for application-specific computing are many and varied. Some sample application areas include information systems, signal and image processing, multimedia systems, communication, high-speed networks, sensor networks, compression, graphics, cryptography, and many areas of computational science.


2013 IEEE International 3D Systems Integration Conference (3DIC)

Technologies for enabling 3D systems based on Through Silicon Vias.

  • 2011 IEEE International 3D Systems Integration Conference (3DIC)

    3DIC 2012 will cover all 3D Integration topics, including 3D process technology, materials, equipment, circuits technology, design and test methodology and applications. The conference invites authors and attendees to submit and interact with 3D integration researchers from all around the world.

  • 2010 IEEE International 3D Systems Integration Conference (3DIC)

    3DIC 2010 will cover all 3D Integration topics, including 3D process technology, materials, equipment, circuits technology, design methodology and applications.

  • 2009 3rd International Conference on 3D System Integration (3DIC)

    covers all the topics in 3DIC, including 3D process technology, materials, equipment, circuits technology, design methodology and applications.


IEEE EUROCON 2013

The IEEE Region 8 EuroCon 2013 Conference is a premier forum for the exchange of ideas, open and direct discussion on the development of the Circuits and Systems, Multimedia, Information and Communication Technology and energy and power systems. It has achieved a considerable success during the past seven editions covering majority of the fields in the area of electrical engineering.


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Periodicals related to DRAM chips

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Multimedia, IEEE Transactions on

The goal of IEEE Transactions on Multimedia is to integrate all aspects of multimedia systems and technology, signal processing, and applications. It will cover various aspects of research in multimedia technology and applications including, but not limited to: circuits, algorithms and macro/micro-architectures, software, detailed design, synchronization, interaction, joint processing and coordination of multimedia and multimodal signals/data, compression, storage, retrieval, communication, ...


Solid-State Circuits, IEEE Journal of

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits. It also provides coverage of topics such as device modeling, technology, systems design, layout, and testing that relate directly to IC design. Integrated circuits and VLSI are of principal interest; material related to discrete ...


Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Integrated circuits and systems;VLSI based Architecture and applications; highspeed circuits and interconnect; mixed-signal SoC; speed/area/power/noise tradeoffs in CMOS circuits.




Xplore Articles related to DRAM chips

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Characterization of MoSi<inf>2</inf>-gate buried channel MOSFET's for a 256K-bit dynamic RAM

Tanaka, T.; Ishiuchi, H.; Takeuchi, Y.; Ishikawa, M.; Mochizuki, T.; Ozawa, O. Electron Devices Meeting, 1981 International, 1981

MoSi2-gate buried channel MOSFETs as a transfer gate of a memory cell and an element of peripheral circuits of a 256k-bit dynamic RAM have been investigated. Two-dimensional numerical analysis predicts that MoSi2-gate buried channel MOSFETs have inherently larger subthreshold leakage current than conventional Si-gate MOSFETs, but it can be improved by a deep ion- implantation. Experimental results which support the ...


A deep-trenched capacitor technology for 4 mega bit dynamic RAM

Yamada, K.; Yamabe, K.; Tsunashima, Y.; Imai, K.; Kashio, T.; Tango, H. Electron Devices Meeting, 1985 International, 1985

A deep-trenched capacitor technology is one of key processes for realizing 4Mb DRAM(1). Major subjects in this technology are to form a precisely controlled shallow diffusion layer at vertical side walls and to grow high reliable thin gate oxide on the trenched Si surface. In this paper, arsenic doping from As doped SiO2(AsSG) film into the vertical side walls and ...


When caches aren't enough: data prefetching techniques

Vander Wiel, S.P.; Lilja, D.J. Computer, 1997

With data prefetching, memory systems call data into the cache before the processor needs it, thereby reducing memory-access latency. Using the most suitable techniques is critical to maximizing data prefetching's effectiveness. The authors review three popular prefetching techniques: software-initiated prefetching, sequential hardware-initiated prefetching, and prefetching via reference prediction tables


External Memory Controller for Virtex II Pro

Donchev, B.; Kuzmanov, G.; Gaydadjiev, G.N. System-on-Chip, 2006. International Symposium on, 2006

An implementation of an on chip memory (OCM) based dual data rate external memory controller (OCM2DDR) for Virtex II Pro is described. The proposed OCM2DDR controller comprises data side OCM (DSOCM) bus interface module, read and write control logic, halt read module and Xilinx DDR controller IP core. The presented design supports 16MB of external DDR memory and 32 to ...


Alpha-particle-induced soft error rate modeling

Sai-Halasz, G. Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International, 1982

Monte Carlo procedures have been developed to obtain soft error rates (SER). The SER for a 1μm groundrule DRAM, due to alphas enamating from processing materials, shows the prevalence of multiple errors. SER reducing methods, using epi-layers, buried implant layers and Hi-C structures have been evaluated and found to be marginally effective.


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Educational Resources on DRAM chips

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