IEEE Organizations related to D-HEMTs

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Conferences related to D-HEMTs

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2012 28th International Conference on Microelectronics (MIEL 2012)

Conference provides an international forum for the presentation and discussion of the recent development and future trends in the field of microelectronics. It covers important aspects of micro- and nano-electronic devices, circuits and systems.

  • 2010 27th International Conference on Microelectronics (MIEL 2010)

    Various aspects of micro- and nano-electronic devices, circuits and systems, including materials and processes, technologies and devices, device physics and modelling, process and device simulation, circuit design and testing, system design and packagin, and characterization and reliability.

  • 2008 26th International Conference on Microelectronics (MIEL 2008)

    All important aspects of micro- and nano-electronic devices, circuits and systems, including: materials and processes, technologies and devices, device physics and modeling, process and device simulation, circuit and system design and testing, packaging, characterization and reliability, etc.

  • 2006 25th International Conference on Microelectronics (MIEL 2006)



Periodicals related to D-HEMTs

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Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.




Xplore Articles related to D-HEMTs

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5 GHz /spl Sigma//spl Delta/ analog-to-digital converter with polarity alternating feedback comparator

Miyashita, T.; Olmos, A.; Nihei, M.; Watanabe, Y. Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual, 1997

We designed and fabricated a 5 GHz oversampling, 100 MHz bandwidth continuous time second order /spl Sigma//spl Delta/ analog-to-digital converter (ADC) using 0.4-/spl mu/m InGaP/-InGaAs enhancement and depletion mode high electron mobility transistor (E/D HEMT) technology. We propose the polarity alternating feedback (PAF) technique for enhancing the sampling frequency and have applied it in the design of an ADC circuit. ...


Monte Carlo simulation of HEMT

Ueno, H.; Yamakawa, S.; Hamaguchi, C.; Miyatsuji, K. Physics and Computer Modeling of Devices Based on Low-Dimensional Structures, 1995. Proceedings., International Workshop on, 1995

Device simulation of HEMT (High Electron Mobility Transistor) has been carried out by ensemble Monte Carlo simulation. Since the electrons in HEMT are confined in GaAs region at the GaAs-AlGaAs hetero-interface, their motion is two-dimensional when the electron energy is low and thus we have to take into account the quantization of electrons at the interface. In order to develop ...


InP-based HEMTs for high speed, low power circuit applications

Adesida, I.; Mahajan, A.; Cueva, G. Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on, 1998

Processes for the monolithic integration of enhancement- and depletion-mode HEMTs (E/D-HEMTs) in the lattice matched InP material system are described. Using the buried Pt gate technology, 0.3 μm gate-length E-HEMTs exhibiting a threshold voltage of +167 mV and a maximum extrinsic transconductance, gmext, of 700 mS/mm are demonstrated. D-HEMTs with corresponding device parameters of -443 mV and 462 mS/mm are ...


A high-speed resonant tunneling flip-flop circuit employing a monostable-bistable transition logic element (MOBILE) with an SCFL-type output buffer

Maezawa, K.; Matsuzaki, Hideaki; Osaka, J.; Yokoyama, H.; Yamamoto, M.; Otsuji, T. Indium Phosphide and Related Materials, 1998 International Conference on, 1998

A resonant tunneling flip-flop circuit was fabricated based on a monostable- bistable transition logic element (MOBILE). In this work, an SCFL-type output buffer and depletion-mode HEMTs were employed in a different way to previous studies. A practical output voltage level close to the SCFL interface was first demonstrated with a MOBILE circuit operating at a high bit rate of up ...


Integrated gate-protected HEMTs and mixed-signal functional blocks for GaN smart power ICs

Kwan, A.M.H.; Xiaosen Liu; Chen, K.J. Electron Devices Meeting (IEDM), 2012 IEEE International, 2012

On a GaN smart power IC platform, a robust GaN high electron mobility transistor (HEMT) with integrated gate protection is demonstrated by embedding a depletion-mode HEMT (D-HEMT) into the gate electrode of an enhancement-mode HEMT (E-HEMT). This protection scheme allows large input bias (e.g. 20 V) without gate-overdrive-induced reliability issues, and yields no penalties on the ON-state current and OFF-state ...


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Educational Resources on D-HEMTs

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eLearning

5 GHz /spl Sigma//spl Delta/ analog-to-digital converter with polarity alternating feedback comparator

Miyashita, T.; Olmos, A.; Nihei, M.; Watanabe, Y. Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1997. Technical Digest 1997., 19th Annual, 1997

We designed and fabricated a 5 GHz oversampling, 100 MHz bandwidth continuous time second order /spl Sigma//spl Delta/ analog-to-digital converter (ADC) using 0.4-/spl mu/m InGaP/-InGaAs enhancement and depletion mode high electron mobility transistor (E/D HEMT) technology. We propose the polarity alternating feedback (PAF) technique for enhancing the sampling frequency and have applied it in the design of an ADC circuit. ...


Monte Carlo simulation of HEMT

Ueno, H.; Yamakawa, S.; Hamaguchi, C.; Miyatsuji, K. Physics and Computer Modeling of Devices Based on Low-Dimensional Structures, 1995. Proceedings., International Workshop on, 1995

Device simulation of HEMT (High Electron Mobility Transistor) has been carried out by ensemble Monte Carlo simulation. Since the electrons in HEMT are confined in GaAs region at the GaAs-AlGaAs hetero-interface, their motion is two-dimensional when the electron energy is low and thus we have to take into account the quantization of electrons at the interface. In order to develop ...


InP-based HEMTs for high speed, low power circuit applications

Adesida, I.; Mahajan, A.; Cueva, G. Solid-State and Integrated Circuit Technology, 1998. Proceedings. 1998 5th International Conference on, 1998

Processes for the monolithic integration of enhancement- and depletion-mode HEMTs (E/D-HEMTs) in the lattice matched InP material system are described. Using the buried Pt gate technology, 0.3 μm gate-length E-HEMTs exhibiting a threshold voltage of +167 mV and a maximum extrinsic transconductance, gmext, of 700 mS/mm are demonstrated. D-HEMTs with corresponding device parameters of -443 mV and 462 mS/mm are ...


A high-speed resonant tunneling flip-flop circuit employing a monostable-bistable transition logic element (MOBILE) with an SCFL-type output buffer

Maezawa, K.; Matsuzaki, Hideaki; Osaka, J.; Yokoyama, H.; Yamamoto, M.; Otsuji, T. Indium Phosphide and Related Materials, 1998 International Conference on, 1998

A resonant tunneling flip-flop circuit was fabricated based on a monostable- bistable transition logic element (MOBILE). In this work, an SCFL-type output buffer and depletion-mode HEMTs were employed in a different way to previous studies. A practical output voltage level close to the SCFL interface was first demonstrated with a MOBILE circuit operating at a high bit rate of up ...


Integrated gate-protected HEMTs and mixed-signal functional blocks for GaN smart power ICs

Kwan, A.M.H.; Xiaosen Liu; Chen, K.J. Electron Devices Meeting (IEDM), 2012 IEEE International, 2012

On a GaN smart power IC platform, a robust GaN high electron mobility transistor (HEMT) with integrated gate protection is demonstrated by embedding a depletion-mode HEMT (D-HEMT) into the gate electrode of an enhancement-mode HEMT (E-HEMT). This protection scheme allows large input bias (e.g. 20 V) without gate-overdrive-induced reliability issues, and yields no penalties on the ON-state current and OFF-state ...


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Standards related to D-HEMTs

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