CMOSFET logic devices

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Conferences related to CMOSFET logic devices

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2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012

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2012 International Symposium on Circuits and Systems (ISCAS 2012) aims at providing the world's premier forum of leading researchers in circuits and systems areas from academia and industries, especially focusing on Convergence of BINET (BioInfoNanoEnviro Tech.) which represents BT, IT, NT and ET and leading Human Life Revolutions. Prospective authors are invited to submit papers of their original works emphasizing contributions beyond the present state of the art. We also welcome proposals on special tuto


2008 IEEE Symposium on VLSI Technology

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Xplore Articles related to CMOSFET logic devices

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  • Supply and threshold-Voltage trends for scaled logic and SRAM MOSFETs

    Morifuji, E.; Yoshida, T.; Kanda, M.; Matsuda, S.; Yamada, S.; Matsuoka, F. Electron Devices, IEEE Transactions on, 2006

    The authors show new guidelines for V<sub>dd</sub> and threshold voltage (V<sub>th</sub>) scaling for both the logic blocks and the high-density SRAM cells from low power-dissipation viewpoint. For the logic operation, they have estimated the power and the speed for inverter gates with a fanout=3. They find that the optimum V<sub>dd</sub> is very sensitive to switching activity in addition to the ...

  • Novel SOI wafer engineering using low stress and high mobility CMOSFET with <100>-channel for embedded RF/analog applications

    Matsumoto, T.; Maeda, S.; Dang, H.; Uchida, T.; Ota, K.; Hirano, Y.; Sayama, H.; Iwamatsu, T.; Ipposhi, T.; Oda, H.; Maegawa, S.; Inoue, Y.; Nishimura, T. Electron Devices Meeting, 2002. IEDM '02. International, 2002

    For high performance RF/analog and logic device technology, novel SOI wafer engineering featuring <100>-channel SOI CMOSFET with high-resistivity substrate is proposed. Mobility of PMOSFET is improved about 16% by changing a channel direction from <110> to <100>. Moreover, the reduction of the drive current in narrow channel PMOSFET is suppressed. The maximum oscillation frequency (f<sub>max</sub>) for NMOSFET is improved around ...

  • LP/LV ratioed DG-SOI logic with (intrinsically on) symmetric DG-MOSFET load

    Mitra, S.; Salman, A.; Ioannou, D.P.; Ioannou, D.E. SOI Conference, IEEE International 2002, 2002

    Summary form only given. Over the last several years there has been a great deal of excitement about the double-gate (DG) SOI MOSFET as the enabling Si device for the 0.05 &mu;m node and beyond. As a result a number of DG structures have been proposed and analyzed, and several have been experimentally demonstrated. Although these devices are currently being ...

  • Full Two-Dimensional Markov Chain Analysis of Thermal Soft Errors in Subthreshold Nanoscale CMOS Devices

    Jannaty, P.; Sabou, F.C.; Bahar, R.I.; Mundy, J.; Patterson, W.; Zaslavsky, A. Device and Materials Reliability, IEEE Transactions on, 2011

    Thermally induced fluctuations in the logic state of a simple flip-flop occur on a timescale that renders them impossible to simulate through Monte Carlo methods. In a previous work, an analytical framework based on Markov chains and queue theory was introduced along with a symbolic solution for a truncated 1-D queue, diagonally connecting the two stable logic states in a ...

  • Library-less synthesis for static CMOS combinational logic circuits

    Gavrilov, S.; Glebov, A.; Pullela, S.; Moore, S.C.; Dharchoudhury, A.; Panda, R.; Vijayan, G.; Blaauw, D.T. Computer-Aided Design, 1997. Digest of Technical Papers., 1997 IEEE/ACM International Conference on, 1997

    Traditional synthesis techniques optimize CMOS circuits in two phases: i) logic minimization and ii) library mapping phase. Typically, the structures and the sizes of the gates in the library are chosen to yield good synthesis results over many blocks or even for an entire chip. Consequently this approach precludes an optimal design of individual blocks which may need custom structures. ...

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Jobs related to CMOSFET logic devices

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Electrical Engineer 4 - Xilinx FPGA Logic Designer Egg Harbor Township, NJ ASRC Aerospace Corporation
Circuit Analyst - Semiconductor Devices Sandia National Laboratories
Chair (W2/W3) of Organic Devices Technische Universität Dresden
Processor Core IP Development Logic Design Engineer (Multiple Levels) - Austin, TX Qualcomm, Inc.
Processor Core IP Development Logic Design Engineer - Austin, Texas Qualcomm, Inc.
Processor Core IP Development Logic Design Engineer (New Grad) - Raleigh, NC Qualcomm, Inc.
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Electrical Engineer (ref. EE) Delphi Corporation
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Digital Design Engineer(s) for Mixed-Signal ASICs Qualcomm, Inc.
Baseband HW Applications Engineer for Automotive support Qualcomm, Inc.
Network-on-Chip and Memory Hierarchy Performance Model Developer - Raleigh, NC (RTP) Qualcomm, Inc.
SOC Debug, Diagnostics, and Profiling Hardware Design - Raleigh, NC Qualcomm, Inc.
Analog IC Design Engineer - CONTRACT ROLE Qualcomm, Inc.
Software Engineer - Augmented Reality Qualcomm, Inc.
Senior Physical Design Engineer Qualcomm, Inc.
Digital IC Design Engineer (MEMS Display Modules) Qualcomm, Inc.
Electronic Technician Port Authority Trans-Hudson
Digital Design Engineer Qualcomm, Inc.

Educational Resources on CMOSFET logic devices

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Standards related to CMOSFET logic devices

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Periodicals related to CMOSFET logic devices

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  • Device and Materials Reliability, IEEE Transactions on

    Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...

  • Electron Device Letters, IEEE

    Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.

  • Electron Devices, IEEE Transactions on

    Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


IEEE Organizations related to CMOSFET logic devices

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