CMOSFET logic devices
58 resources related to CMOSFET logic devices
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2016 IEEE Symposium on VLSI Technology
New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.
2014 IEEE International Symposium on Circuits and Systems (ISCAS)
The IEEE International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems Society and the world’s premier networking forum in the highly active fields of theory, design and implementation of circuits and systems.ISCAS 2014 will have a special focus on nano/bio circuits and systems applied to enhancing living and lifestyles, and seeks to address multidisciplinary challenges in healthcare and well-being, the environment and climate change.
Provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the ...
Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Kechichian, K.; Al-Khalili, A.J.; Al-Khalili, D. Electrical and Computer Engineering, 1994. Conference Proceedings. 1994 Canadian Conference on, 1994
In VLSI CMOS circuit design chip area, signal propagation delay and power dissipation are conflicting criteria that need to be optimized in order to improve performance. Full circuit simulation and manual optimization can be costly and time consuming. We present here a method of obtaining different circuit configurations from a given multiple-output Boolean expression. An optimum circuit is selected from ...
Han, L.K.; Crowder, S.; Hargrove, M.; Wu, E.; Lo, S.H.; Guarin, F.; Crabbe, E.; Su, L. Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International, 1997
We present a detailed study of electrical characteristics of sub-3 nm gate oxides grown on nitrogen implanted Si substrates (N/sub 2/ I/I oxides). The new results that advance the understanding of N/sub 2/ I/I oxides are the following: lower tunneling current, higher TDDB lifetime and reduced defect density are reported in N/sub 2/ I/I oxides for the first time. In ...
Matsumoto, T.; Maeda, S.; Dang, H.; Uchida, T.; Ota, K.; Hirano, Y.; Sayama, H.; Iwamatsu, T.; Ipposhi, T.; Oda, H.; Maegawa, S.; Inoue, Y.; Nishimura, T. Electron Devices Meeting, 2002. IEDM '02. International, 2002
For high performance RF/analog and logic device technology, novel SOI wafer engineering featuring <100>-channel SOI CMOSFET with high-resistivity substrate is proposed. Mobility of PMOSFET is improved about 16% by changing a channel direction from <110> to <100>. Moreover, the reduction of the drive current in narrow channel PMOSFET is suppressed. The maximum oscillation frequency (f/sub max/) for NMOSFET is improved ...
Kuroi, T.; Shimizu, S.; Ogino, S.; Teramoto, A.; Shirahata, M.; Okumura, Y.; Inuishi, M.; Miyoshi, H. VLSI Technology, 1996. Digest of Technical Papers. 1996 Symposium on, 1996
The high performance 0.25 /spl mu/m dual gate CMOS with ultrathin gate oxide of 2 nm is demonstrated for low-voltage logic application. The boron penetration can effectively be suppressed by the nitrogen implantation technique, even if the gate oxide film is reduced to 2 nm. Moreover the inverter delay with an Al interconnect load can be remarkably improved by the ...
Knight, T.; Wu, H.M. VLSI Circuits, 1993. Digest of Technical Papers. 1993 Symposium on, 1993
We have presented a novel technique that allows skew-free distribution of digital signals with known and controllable arrival times. The technique requires adjustments and measurements only at the sender. Our method is based on measuring the round trip delay of a signal and then adjusting it with a pair of matched delay lines. This technique can be modified to work ...
Provably-Correct Robot Control with LTLMoP, OMPL and ROS
IEEE Life Sciences: Wearable Medical Devices Advancing bioengineering
The Long Term Reliability of Gallium Nitride
2013 IEEE Robert N. Noyce Medal
Radiated Performance Assessment of Wireless Communications Devices - An Operator's Perspective
APEC 2015: KeyTalks - How to Optimize Performance and Reliability of GaN Power Devices
Superconductive Energy-Efficient Computing - ASC-2014 Plenary-series - 6 of 13 - Wednesday 2014/8/13
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
ASC-2014 SQUIDs 50th Anniversary: 3 of 6 - Bob Fagaly
CES 2015 DAY 1: TAN LE AND MIND-CONTROL TECHNOLOGY
Open Sesame: Design Guidelines for Invisible Passwords
Transphorm: GaN Champions
Evaluating Over-The-Air Performance of MIMO Wireless Devices
The IMS Core, Wireless Network Architecture and LTE
BSIM Spice Model Enables FinFET and UTB IC Design
Reducing Electricity Usage: APEC 2013 KeyTalk with Dr. Jayant Baliga
IMS 2011 - CREE Overview
IMS 2011 Microapps - Volume Manufacturing Trends for Automotive Radar Devices
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