Capacitance

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In electromagnetism and electronics, capacitance is the ability of a body to hold an electrical charge. Capacitance is also a measure of the amount of electrical energy stored (or separated) for a given electric potential. (Wikipedia.org)






Conferences related to Capacitance

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2013 IEEE International Conference on Mechatronics and Automation (ICMA)

The objective of ICMA 2013 is to provide a forum for researchers, educators, engineers, and government officials involved in the general areas of mechatronics, robotics, automation and sensors to disseminate their latest research results and exchange views on the future research directions.


2012 Conference on Precision Electromagnetic Measurements (CPEM 2012)

The Conference on Precision Electromagnetic Measurements (CPEM) is devoted to topics related to electromagnetic measurements at the highest accuracy levels. These cover the frequency spectrum from dc through the optical region. A major focus of this conference is quantum devices that relate electrical standards to fundamental constants and the international system of units.


IECON 2011 - 37th Annual Conference of IEEE Industrial Electronics

industrial applications of electronics, control, robotics, signal processing, computational and artificial intelligence, sensors and actuators, instrumentation electronics, computer networks, internet and multimedia technologies.


2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009

Analog Signal Processing, Biomedical Circuits and Systems, Blind Signal Processing, Cellular Neural Networks and Array Computing, Circuits and Systems for Communications, Computer-Aided Network Design, Digital Signal Processing, Life-Science Systems and Applications, Multimedia Systems and Applications, Nanoelectronics and Gigascale Systems, Neural Systems and Applications, Nonlinear Circuits and Applications, Power Systems and Power Electronic Circuits, Sensory Systems, Visual Signal Processing and Communi


2007 14th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2007)

ICECS is a major international forum presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. Topics include: Analog/Digital Circuits, and Signal Processing, Sensing and Sensor Networks, Telecommunications and Multimedia, RF and Wireless Circuits & Systems, Photonic and Optoelectronic Circuits, Biomedical Circuits & Systems, Test and Reliability System Architectures and Applications, Neural Network Circuits & Systems, Design Automation of Ele


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Periodicals related to Capacitance

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Electromagnetic Compatibility, IEEE Transactions on

EMC standards; measurement technology; undesired sources; cable/grounding; filters/shielding; equipment EMC; systems EMC; antennas and propagation; spectrum utilization; electromagnetic pulses; lightning; radiation hazards; and Walsh functions


Electron Device Letters, IEEE

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Electron Devices, IEEE Transactions on

Publishes original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronics devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.


Semiconductor Manufacturing, IEEE Transactions on

Addresses innovations of interest to the integrated circuit manufacturing researcher and professional. Includes advanced process control, equipment modeling and control, yield analysis and optimization, defect control, and manufacturability improvement. It also addresses factory modelling and simulation, production planning and scheduling, as well as environmental issues in semiconductor manufacturing.


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Most published Xplore authors for Capacitance

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Xplore Articles related to Capacitance

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Wafer-level packaged RF-MEMS switches fabricated in a CMOS fab

H. A. C. Tilmans; H. Ziad; H. Jansen; O. Di Monaco; A. Jourdain; W. De Raedt; X. Rottenberg; E. De Backer; A. Decaussernaeker; K. Baert International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001

Reports on wafer-level packaged RF-MEMS switches fabricated in a commercial CMOS fab. Switch fabrication is based on a metal surface micromachining process. A novel wafer-level packaging scheme is developed, whereby the switches are housed in on-chip sealed cavities using benzocyclobutene (BCB) as the bonding and sealing material. Measurements show that the influence of the wafer-level package on the RF performance ...


Inversion layer mobility under high normal field in nitrided-oxide MOSFETs

T. Hori IEEE Transactions on Electron Devices, 1990

A comprehensive study on the inversion layer mobility improvement of n-channel MOSFETs with nanometer-range ultra-thin (reoxidized) nitrided oxides is presented. The performance improvement is described from both the device physics modeling and device/circuit design points of view by using the various kinds of current drivability and mobility data over wide ranges of gate drive and Eeff. The nitridation- and reoxidation-condition ...


A compact substrate spreading resistance model for SoC

K. Shakeri; R. Sarvari; J. D. Meindl IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings., 2003

Mixed signal SoC ICs are increasingly being used in commercial products. However, the analog circuits are sensitive to noise which is produced by the digital circuits and propagated by the substrate. In this paper, compact physical 2D and 3D models have been derived for the spreading resistance between multiple contacts within two different substrates. These models can be used to ...


Wakeup synthesis and its buffered tree construction for power gating circuit designs

Seungwhun Paik; Sangmin Kim; Youngsoo Shin 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), 2010

A power gating circuit suffers from large amount of rush current when it wakes up, especially when all switch cells are turned on at the same time. If each switch cell is turned on in different instant of time, the rush current can be reduced. It is shown in this paper that the rush current can be reduced even more ...


Simulation of critical IC-fabrication steps

P. Pichler; W. Jungling; S. Selberherr; E. Guerrero; H. W. Potzl IEEE Transactions on Electron Devices, 1985

Due to the advances in device miniaturization it is often necessary to get a better understanding of the physical fabrication processes by applying advanced physical models. Since existing process modeling programs can handle only specific physical quantities, we have developed general purpose solvers for one and two space dimensions which are able to treat an arbitrary number of coupled partial ...


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Educational Resources on Capacitance

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eLearning

Wafer-level packaged RF-MEMS switches fabricated in a CMOS fab

H. A. C. Tilmans; H. Ziad; H. Jansen; O. Di Monaco; A. Jourdain; W. De Raedt; X. Rottenberg; E. De Backer; A. Decaussernaeker; K. Baert International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224), 2001

Reports on wafer-level packaged RF-MEMS switches fabricated in a commercial CMOS fab. Switch fabrication is based on a metal surface micromachining process. A novel wafer-level packaging scheme is developed, whereby the switches are housed in on-chip sealed cavities using benzocyclobutene (BCB) as the bonding and sealing material. Measurements show that the influence of the wafer-level package on the RF performance ...


Inversion layer mobility under high normal field in nitrided-oxide MOSFETs

T. Hori IEEE Transactions on Electron Devices, 1990

A comprehensive study on the inversion layer mobility improvement of n-channel MOSFETs with nanometer-range ultra-thin (reoxidized) nitrided oxides is presented. The performance improvement is described from both the device physics modeling and device/circuit design points of view by using the various kinds of current drivability and mobility data over wide ranges of gate drive and Eeff. The nitridation- and reoxidation-condition ...


A compact substrate spreading resistance model for SoC

K. Shakeri; R. Sarvari; J. D. Meindl IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings., 2003

Mixed signal SoC ICs are increasingly being used in commercial products. However, the analog circuits are sensitive to noise which is produced by the digital circuits and propagated by the substrate. In this paper, compact physical 2D and 3D models have been derived for the spreading resistance between multiple contacts within two different substrates. These models can be used to ...


Wakeup synthesis and its buffered tree construction for power gating circuit designs

Seungwhun Paik; Sangmin Kim; Youngsoo Shin 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED), 2010

A power gating circuit suffers from large amount of rush current when it wakes up, especially when all switch cells are turned on at the same time. If each switch cell is turned on in different instant of time, the rush current can be reduced. It is shown in this paper that the rush current can be reduced even more ...


Simulation of critical IC-fabrication steps

P. Pichler; W. Jungling; S. Selberherr; E. Guerrero; H. W. Potzl IEEE Transactions on Electron Devices, 1985

Due to the advances in device miniaturization it is often necessary to get a better understanding of the physical fabrication processes by applying advanced physical models. Since existing process modeling programs can handle only specific physical quantities, we have developed general purpose solvers for one and two space dimensions which are able to treat an arbitrary number of coupled partial ...


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IEEE-USA E-Books

  • Dielectric Materials for Integrated Capacitors

    This chapter contains sections titled: Polarizability and Capacitance Capacitance Density Temperature Effects Frequency and Voltage Effects Aging Effects Composition and Morphology Effects Leakage and Breakdown Dissipation Factor Comparison to EIA Dielectric Classifications Matching Dielectric Materials to Applications References

  • Capacitance Phenomena

    The phenomenon of building up a static charge when walking on a carpet illustrates the charge-storing abilities of human body capacitance. Many electronic devices, such as touch-screen displays, touch-sensitive switches, and computer touch pads make use of this property. Capacitors used in electric power applications are typified by the rectangular cans with one or two bushings. When the dielectric materials contain polarized molecules (dipoles), the polarization may be caused by field cancellation from the capacitor plates. In a simple DC circuit, capacitors can be charged through a resistor at an exponential rate. Power capacitors are used in electric power applications mainly for power factor correction and harmonic filters. Filter capacitors cause several electrical hazards, including the risk of electrical shock from a capacitor charged to a high voltage with a high stored energy. The capacitance of a cable is a distributed quantity-the longer the cable, the larger the capacitance.

  • Techniques for Driving Interconnect

    This chapter contains sections titled: Introduction Technology Scaling Trends Problems and Solutions Regarding Capacitance Problems and Solutions Regarding Inductance Problems and Solutions Regarding Resistance Problems and Solutions Regarding Long Distance Routing Conclusion This chapter contains sections titled: Acknowledgments References

  • Size and Configuration of Integrated Capacitors

    This chapter contains sections titled: Comparison of Integrated and Discrete Areas Layout Options Tolerance Mixed Dielectric Strategies CV Product Maximum Capacitance Density and Breakdown Voltage References

  • Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers

    Several techniques to reduce the ground bounce effect in CMOS chips are described. The effective width of the predrive and final driver of a CMOS output buffer is automatically adjusted to compensate for process, voltage, and temperature (PVT) variations. The slew rate of the predrive nodes is controlled by introducing a digitally weighted capacitance. Finally, a compensated active resistance is inserted into both the power and ground leads to further dampen the oscillations. These techniques allow the buffer to behave uniformly over the entire PVT range. Measurements of a O.5-µm CMOS test chip have demonstrated that these new buffers generate 2.5x less ground bounce when compared to conventional buffers. An external resistance is required to set a reference current.

  • Defects

    This chapter contains sections titled: Introduction Generation-Recombination Statistics Capacitance Measurements Current Measurements Charge Measurements Deep-Level Transient Spectroscopy (DLTS) Thermally Stimulated Capacitance and Current Positron Annihilation Spectroscopy (PAS) Strengths and Weaknesses Appendix 5.1 Activation Energy and Capture Cross-Section Appendix 5.2 Time Constant Extraction Appendix 5.3 Si and GaAs Data References Problems Review Questions

  • Low???Energy Operation Mechanisms for XCT???SOI CMOS Devices

    This chapter describes the performance prospects of scaled cross???current tetrode (XCT) CMOS devices and demonstrates the outstanding low???energy aspects of sub???30 nm long gate XCT???SOI CMOS by analyzing device operations. The energy efficiency improvement of such scaled XCT CMOS circuits (two orders higher) stems from the ???source potential floating effect,??? which dynamically reduces effective gate capacitance. It is expected that this feature will be very important in many medical implant applications that demand a long device lifetime without recharging the battery.

  • Electric Power Transmission

    This chapter contains sections titled: Introduction Electric Transmission Line Parameters Line Inductance Line Capacitance Two-Port Networks Transmission Line Models Problems

  • Electrical Characterization of Glass, Teflon, and Tantalum Capacitors at High Temperatures

    Dielectric materials and electrical components and devices employed in radiation fields and space environment are often exposed to elevated temperatures among other things. These systems must, therefore, withstand the high temperature exposure while still providing good electrical and other functional properties. In this work, experiments were carried out to evaluate glass, teflon, and tantalum capacitors for potential use in high temperature applications. The capacitors were characterized in terms of their capacitance and dielectric loss as a function of temperature up to 200 °C. At a given temperature, these properties were obtained in a frequency range of 50 Hz to 100 kHz. DC leakage current measurements were also performed in a temperature range from 20 to 200 °C. The results obtained are discussed and conclusions are made concerning the suitability of the capacitors investigated for high temperature applications.

  • Oxide and Interface Trapped Charges, Oxide Thickness

    This chapter contains sections titled: Introduction Fixed, Oxide Trapped, and Mobile Oxide Charge Interface Trapped Charge Oxide Thickness Strengths and Weaknesses Appendix 6.1 Capacitance Measurement Techniques Appendix 6.2 Effect of Chuck Capacitance and Leakage Current References Problems Review Questions



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