CMOS

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Complementary metal–oxide–semiconductor (CMOS) is a technology for constructing integrated circuits. (Wikipedia.org)






Conferences related to CMOS

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2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAM

  • 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT)

    Process & Device Technologies1. Channel Engineering2. High-k/Metal gate Technology3. Advanced Source/Drain Technology4. Interconnect Technology5. Advanced 3D Integration6. Novel Process Technologies7. Ultra-Thin Body Transistors and Device Variability8. Advanced High-k Metal Gate SoC and High Performance CMOS Platforms 9. CMOS Performance Enhancing and Novel Devices 10. Advanced FinFETs and Nanowire FETs11. CNT, MTJ Devices and Nanowire Photodiodes12. Low- Power and Steep Slope Switching Devices13. Graphene Devices14. Advanced Technologies for Ge MOSFETs15. Organic semiconductor devices and technologies16. Compound semiconductor devices and Technology 17. Ultra High Speed Transistors, HEMT/HBT etc. 18. Advanced Power Devices and Reliability19. Flash Memory20. IT Magnetic RAM21. Resistive RAMs22. Phase Change Memory23. 3-Dimensional Memory24. MEMS Technology25. Thin Film Transistors26. Biosensors27. PV and Energy Harvesting28. Front End of Line (FEOL) R

  • 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High Kdielectric , Advance Memories , nano -electronics, Organic and Compound semiconductor devices ,sensors and MEMS, Semiconductor material erization, Reliability , Modeling and simulation,Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low -power, RF devices & circuits, ICCAD

  • 2010 IEEE 10th International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

    Silicon IC, Silicon/germanium devices , Interconnect , Low K and High K dielectric , Advance Memories , nano-electronics, Organic and Compound semiconductor devices , sensors and MEMS, Semiconductor material characterization, Reliability , Modeling and simulation, Packaging and testing , Digital, Analog, Mixed Signal IC and SOC design technology,Low-power, RF devices & circuits, IC CAD .

  • 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2006 8th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)

  • 2004 7th International Conference on Solid-State and Integrated-Circuit Technology (ICSICT)


2018 15th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON)

Circuits and Systems, Computers, Information Technology, Communication Systems, Control and Instrumentation, Electrical Power Systems, Power Electronics, Signal Processing


2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)

NEWCAS2018 will encompass a wide range of special sessions and keynote talks given by prominent expertscovering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequency circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, device modeling, and embedded portable devices.

  • 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequqncy circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, and embedded portable devices.

  • 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)

    The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared among the organizing entities. This collaboration will be oriented towards advanced research in adaptive systems which constitutes the highlights of the NEWCAS conference, but also areas related to analog and digital signal processing, low power consumption, and circuits and systems designs. The topics include, but are not limited to: Computer architecture and memories, Analog circuit design, Digital and mixed-signal circuit design, RF circuit design, Microsystems, sensors and actuators, Test and verification, Telecom, microwaves and RF, Technology Trends, Data and signal processing, Neural networks and artificial vision, CAD and design tools, Low-Power circ. & syst. techniques, Imaging & image sensors, Embedded hand-held devices, Biomed. circuits & systems, Energy Harvesting / Scavenging

  • 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

    will encompass a wide range of special sessions and keynote talks given by prominent experts covering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2010 8th IEEE International NEWCAS Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2009 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2009)

    Advance in microelectronics in addition to signal analog processing, and their applications to telecommunications, artificial vision and biomedical. This include: system architectures, circuit (digital, analog and mixed) and system-level design, test and verification, data and signal processing, microsystems, memories and sensors and associated analog processing, mathematical methods and design tools.

  • 2008 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2008)

    Advanced research in microelectronics and microsystems constitutes the highlights of the NEWCAS conferences in addition to topics regarding analog data and signal processing and their applications well-established in the TAISA conferences.

  • 2006 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006)

  • 2005 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2005)

  • 2004 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2004)


2018 31st IEEE International System-on-Chip Conference (SOCC)

System on Chip


2018 European Conference on Antennas and Propagation (EuCAP)

Antennas & related topics e.g. theoretical methods, systems, wideband, multiband, UWBPropagation & related topics e.g. modelling/simulation, HF, body-area, urbanAntenna & RCS measurement techniques


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Periodicals related to CMOS

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Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Applied Superconductivity, IEEE Transactions on

Contains articles on the applications and other relevant technology. Electronic applications include analog and digital circuits employing thin films and active devices such as Josephson junctions. Power applications include magnet design as well asmotors, generators, and power transmission


Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


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Xplore Articles related to CMOS

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High-Performance 45nm node CMOS Transistors Featuring Flash Lamp Annealing (FLA)

[{u'author_order': 1, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan. Phone: +81-45-776-4041, FAX: +81-45-776-4111, E-mail: sanuki@amc.toshiba.co.jp', u'full_name': u'T. Sanuki'}, {u'author_order': 2, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Iwamoto'}, {u'author_order': 3, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Ota'}, {u'author_order': 4, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Komoda'}, {u'author_order': 5, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'H. Yamazaki'}, {u'author_order': 6, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'A. Eiho'}, {u'author_order': 7, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Miyagi'}, {u'author_order': 8, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Nakayama'}, {u'author_order': 9, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'O. Fuji'}, {u'author_order': 10, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'M. Togo'}, {u'author_order': 11, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Ohno'}, {u'author_order': 12, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'H. Yoshimura'}, {u'author_order': 13, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Yoshida'}, {u'author_order': 14, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Ito'}, {u'author_order': 15, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'A. Mineji'}, {u'author_order': 16, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Yoshino'}, {u'author_order': 17, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Itani'}, {u'author_order': 18, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Matsuo'}, {u'author_order': 19, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Sato'}, {u'author_order': 20, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'S. Mori'}, {u'author_order': 21, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Nakazawa'}, {u'author_order': 22, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'M. Nakazawa'}, {u'author_order': 23, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Shinyama'}, {u'author_order': 24, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Suguro'}, {u'author_order': 25, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'I. Mizushima'}, {u'author_order': 26, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'S. Iwasa'}, {u'author_order': 27, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'S. Muramatsu'}, {u'author_order': 28, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Nagaoka'}, {u'author_order': 29, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'M. Ikeda'}, {u'author_order': 30, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'M. Saito'}, {u'author_order': 31, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'H. Naruse'}, {u'author_order': 32, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'Y. Enomoto'}, {u'author_order': 33, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Kitano'}, {u'author_order': 34, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'M. Iwai'}, {u'author_order': 35, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'K. Imai'}, {u'author_order': 36, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'N. Nagashima'}, {u'author_order': 37, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'T. Kuwata'}, {u'author_order': 38, u'affiliation': u'Advanced CMOS Technology Group, Advanced Logic Technology Dept., System LSI Division, Toshiba Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 235-8522, Japan', u'full_name': u'F. Matsuoka'}] 2007 IEEE International Electron Devices Meeting, 2007

This paper describes the fabrication and performance of CMOS transistors featuring flash lamp annealing (FLA) for 45 nm node. We show, for the first time, applying FLA prior to spike RTA as S/D annealing is effective to enhance the channel stress in PFET with epitaxially grown SiGe (eSiGe) S/D. In NFET, FLA recovers the damaged layer in S/D extension caused ...


Practical implications of via-middle Cu TSV-induced stress in a 28nm CMOS technology for Wide-IO logic-memory interconnect

[{u'author_order': 1, u'affiliation': u'Texas Instruments, Advanced CMOS Group, External Development & Manufacturing, Dallas, USA', u'full_name': u'J. West'}, {u'author_order': 2, u'affiliation': u'Texas Instruments, Advanced CMOS Group, External Development & Manufacturing, Dallas, USA', u'full_name': u'Y.S. Choi'}, {u'author_order': 3, u'affiliation': u'Texas Instruments, Advanced CMOS Group, External Development & Manufacturing, Dallas, USA', u'full_name': u'C. Vartuli'}] 2012 Symposium on VLSI Technology (VLSIT), 2012

The impact of isolated and arrayed 10×60μm via-middle Cu TSVs on 8LM 28nm node CMOS poly-SiON P/NFETs was electrically measured for proximities >;4 μm at 27C and 105C. The largest observed shift in Ion(<;2.3%) is significantly less than that from other context-dependent sources such as dual stress liner boundaries (~10%). NanoBeam Diffraction measurements of Si strain within 5μm of TSVs ...


Management of Power and Performance with Stress Memorization Technique for 45nm CMOS

[{u'author_order': 1, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation. Phone: +81-45-770-3498, FAX: +81-45-770-3194, E-mail: eiho@semicon.toshiba.co.jp', u'full_name': u'A. Eiho'}, {u'author_order': 2, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'T. Sanuki'}, {u'author_order': 3, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'E. Morifuji'}, {u'author_order': 4, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'T. Iwamoto'}, {u'author_order': 5, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'G. Sudo'}, {u'author_order': 6, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'K. Fukasaku'}, {u'author_order': 7, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'K. Ota'}, {u'author_order': 8, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'T. Sawada'}, {u'author_order': 9, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'O. Fuji'}, {u'author_order': 10, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'H. Nii'}, {u'author_order': 11, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'M. Togo'}, {u'author_order': 12, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'K. Ohno'}, {u'author_order': 13, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'K. Yoshida'}, {u'author_order': 14, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'H. Tsuda'}, {u'author_order': 15, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'T. Ito'}, {u'author_order': 16, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'Y. Shiozaki'}, {u'author_order': 17, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'N. Fuji'}, {u'author_order': 18, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'H. Yamazaki'}, {u'author_order': 19, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'M. Nakazawa'}, {u'author_order': 20, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'S. Iwasa'}, {u'author_order': 21, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'S. Muramatsu'}, {u'author_order': 22, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'K. Nagaoka'}, {u'author_order': 23, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'M. Iwai'}, {u'author_order': 24, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'M. Ikeda'}, {u'author_order': 25, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'M Saito'}, {u'author_order': 26, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'H. Naruse'}, {u'author_order': 27, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'Y. Enomoto'}, {u'author_order': 28, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'Kitano'}, {u'author_order': 29, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'S. Yamada'}, {u'author_order': 30, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'K. Imai'}, {u'author_order': 31, u'affiliation': u'Sony Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'N. Nagashima'}, {u'author_order': 32, u'affiliation': u'NEC Electronics Corporation, 8, Shinsugita-cho, Isogo-ku, Yokohama, 210-2582, Japan', u'full_name': u'T. Kuwata'}, {u'author_order': 33, u'affiliation': u'Advanced CMOS Technology Group Advanced Logic Technology Dept. System LSI Division, Toshiba Corporation', u'full_name': u'F. Matsuoka'}] 2007 IEEE Symposium on VLSI Technology, 2007

The effect of stress memorization technique (SMT) in performance and power reduction is maximized by choosing the appropriate stressor with large stress change by spike RTA. 30% mobility enhancement and 60% reduction of gate leakage have been achieved simultaneously. Stress distribution in channel region for SMT is confirmed to be uniform, hence layout dependency is minimized and performance is maximized ...


Recent status on Nano CMOS and future direction

[{u'author_order': 1, u'affiliation': u'Frontier Collaborative Research Center, Tokyo Institute of Technology, 4259-J2-68, Nagatsuta-cho, Midori-ku, Yokohama, 226-8502 Japan', u'full_name': u'Hiroshi Iwai'}] 2006 International Workshop on Nano CMOS, 2006

Recently, CMOS downsizing has been accelerated very aggressively in both production and research level, and even transistor operation of a 5 nm gate length CMOS was reported in a conference. However, many serious problems are expected for implementing small-geometry MOSFETs into large scale integrated circuits even for 45 nm technology node, and it is still questionable if we can successfully ...


Broadband CMOS class-E power amplifier for LTE applications

[{u'author_order': 1, u'affiliation': u'Mixed Signal CMOS Circuits, UMIC Research Centre, RWTH Aachen University, 52056, Germany', u'full_name': u'Danish Kalim'}, {u'author_order': 2, u'affiliation': u'Mixed Signal CMOS Circuits, UMIC Research Centre, RWTH Aachen University, 52056, Germany', u'full_name': u'Denis Erguvan'}, {u'author_order': 3, u'affiliation': u'Mixed Signal CMOS Circuits, UMIC Research Centre, RWTH Aachen University, 52056, Germany', u'full_name': u'Renato Negra'}] 2009 3rd International Conference on Signals, Circuits and Systems (SCS), 2009

High level integration for system on chip (SOC) applications motivates the development of broadband power amplifiers (PAs) in low cost CMOS technology to reduce size and power consumption of any wireless system. However, integration of one of the key components in a transmitter-the PA still remains a challenge. In this paper, a single stage broadband class-E PA based on lumped ...


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IEEE-USA E-Books

  • TLU in CMOS ICs in the Electrical Fast Transient Test

    introduces the TLU under the electrical fast transient (EFT) test. The EFT test is used to demonstrate the immunity of electronic equipment to transient disturbances such as those originating from switching transients. During the EFT test, the EFT generator applies a number of fast pulses, coupled into power supply, control, signal, and ground ports of electronic equipment. Same as the system-level ESD test, TLU can be easily initiated by sweep-back current under the EFT test. Different types of noise filter networks are also investigated to find their effectiveness for improving the TLU immunity against EFT tests.

  • Appendix A: Practical ApplicationExtractions of Latchup Design Rules in a 0.18m 1.8 V/3.3V Silicided CMOS Process

    This appendix contains sections titled: * For I/O Cells * For Internal Circuits * For between I/O and Internal Circuits * For Circuits across Two Different Power Domains * Suggested Layout Guidelines ]]>

  • CMOS Basic Circuits

    This chapter contains sections titled: * Combinational Logic * Sequential Logic * Input-Output (I/O) Circuitry * Summary * References * Exercises

  • TLU Dependency on PowerPin Damping Frequency and Damping Factor in CMOS Integrated Circuits1 2007 IEEE. 4.14.3 and part of 4.4 reprinted, with permission, from ShengFu Hsu and MingDou Ker, Transientinduced latchup dependence on powerpin damping frequency and damping factor in CMOS integrated circuits (abstractsection IV and figures 2, 3, 711, and 1416), in IEEE Transactions on Electron Devices, Vol. 54, no. 8, pp. 20022010, Aug. 2007. IEEE, Piscataway, NJ.

    characterizes the TLU dependencies on two dominant parameters of TLU- triggering transient noises, power-pin damping frequency and damping factor. In real situations, they are strongly dependent on the system shielding, board-level noise filter, chip-/board- level layout, etc. Their impacts on the TLU immunity can be well explained in time domain by device simulation. Based on the comprehensive simulation results and experimental verifications, the board-level noise filters can be properly developed to efficiently eliminate the ESD-coupled noises for TLU prevention.

  • CMOS 3‐D‐Integrated MEMS Sensor

    This chapter presents one TSV‐less 3‐D complimentary metal‐oxide semiconductor (CMOS)‐on‐micro‐electro‐mechanical system (MEMS) integration technique using direct metal bonding. The CMOS‐on‐MEMS integration leads to a simultaneous formation of electrical, mechanical, and hermetic bonds, eliminates chip‐to‐chip wire‐bonding, and hence presents competitive advantages over hybrid or monolithic solutions. The MEMS sensor is a capacitive accelerometer. The basic working principle of the MEMS accelerometer is the displacement of a small proof mass etched into the silicon surface of the integrated circuit and suspended by small beams. The CMOS readout circuit for MEMS consists of a low‐noise, band‐pass gain stage, a fully differential synchronous demodulator, and an off‐chip, low‐pass filter. The chapter illustrates a figure of the heterogeneous 3‐D TSV‐less accelerometer structure. The CMOS readout circuit is stacked on the MEMS accelerometer using face‐to‐face (F2F) direct metal bonding, which provides smaller form factor, latency, and power.

  • Methods and Tools for Mixed Signal Circuit Design

  • Index

    No abstract.

  • Mixed Signals, Technology and Techniques

  • CMOS Circuit Fabrication

    This chapter contains sections titled: * Wafer Preparation * Oxidation * Deposition, Lithography and Etching * Epitaxy, Diffusion and Ion Implantation * Contacts and Interconnects * Masks and Design Rules * Problems ]]>

  • Conclusion

    This conclusion presents some closing thoughts on concepts discussed in the preceding chapters of this book. The book introduces Complementary Metal Oxide Semiconductor (CMOS)‐based scalable integration of multiple different types of sensors from different domains, or so‐called multi‐modal sensors, including impedance, terahertz, ultrasonic, optical, and electrochemical sensors, etc. They are presented from working principle, circuit design, and system implementation, as well as biomedical applications. The book summarizes the common readout circuit design with a number of demonstrated readout circuit designs for each different type of CMOS sensor in different domains. It reports the recent progress in the CMOS‐integrated multimodal biomedical sensor platform for personalized diagnosis. The CMOS‐based multimodal sensor platform has shown a promising future to integrate microfluidics, micro‐electro‐mechanical systems (MEMS), and CMOS sensors, as well as smart data analysis for personal biomedical diagnosis.



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