Conferences related to Mitigation

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2019 IEEE 20th International Workshop on Signal Processing Advances in Wireless Communications (SPAWC)

For its 20th year edition, the IEEE International Workshop on Signal Processing Advances in Wireless Communications (SPAWC) 2019, returns to the country that saw its birth, France. Held in Cannes, in the heart of the world renown “French Riviera” (Cote d’Azur in French), the SPAWC 2019 will exhibit a technical program complete with high profile plenaries, invited and contributed papers, all appearing under IEEE explore. A flagship workshop of the IEEE SP Society SPCOM technical committee, SPAWC 2019 will combine cutting edge research in the fields of signal processing, statistical learning, communication theory, wireless networking and more, together with an exciting social program on the glamorous and sunny Riviera.


2018 13th IEEE Conference on Industrial Electronics and Applications (ICIEA)

Industrial Informatics, Computational Intelligence, Control and Systems, Cyber-physicalSystems, Energy and Environment, Mechatronics, Power Electronics, Signal and InformationProcessing, Network and Communication Technologies


2018 15th IEEE Annual Consumer Communications & Networking Conference (CCNC)

IEEE CCNC 2018 will present the latest developments and technical solutions in the areas of home networking, consumer networking, enabling technologies (such as middleware) and novel applications and services. The conference will include a peer-reviewed program of technical sessions, special sessions, business application sessions, tutorials, and demonstration sessions


2018 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC)

The conference program will consist of plenary lectures, symposia, workshops and invitedsessions of the latest significant findings and developments in all the major fields of biomedical engineering.Submitted papers will be peer reviewed. Accepted high quality papers will be presented in oral and postersessions, will appear in the Conference Proceedings and will be indexed in PubMed/MEDLINE


2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


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Periodicals related to Mitigation

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Aerospace and Electronic Systems Magazine, IEEE

The IEEE Aerospace and Electronic Systems Magazine publishes articles concerned with the various aspects of systems for space, air, ocean, or ground environments.


Antennas and Propagation, IEEE Transactions on

Experimental and theoretical advances in antennas including design and development, and in the propagation of electromagnetic waves including scattering, diffraction and interaction with continuous media; and applications pertinent to antennas and propagation, such as remote sensing, applied optics, and millimeter and submillimeter wave techniques.


Biomedical Engineering, IEEE Transactions on

Broad coverage of concepts and methods of the physical and engineering sciences applied in biology and medicine, ranging from formalized mathematical theory through experimental science and technological development to practical clinical applications.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Communications Letters, IEEE

Covers topics in the scope of IEEE Transactions on Communications but in the form of very brief publication (maximum of 6column lengths, including all diagrams and tables.)


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Most published Xplore authors for Mitigation

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Xplore Articles related to Mitigation

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Diagnosis and Fault Mitigation in a Microgrid Using Model Predictive Control

[{u'author_order': 1, u'affiliation': u'Ing. de Sistemas y Automatica Universidad de Sevilla, Sevilla, Spain', u'full_name': u'J. J. Marquez'}, {u'author_order': 2, u'affiliation': u'Ing. de Sistemas y Automatica Universidad de Sevilla, Sevilla, Spain', u'full_name': u'A. Zafra-Cabeza'}, {u'author_order': 3, u'affiliation': u'Ing. de Sistemas y Automatica Universidad de Sevilla, Sevilla, Spain', u'full_name': u'C. Bordons'}] 2018 International Conference on Smart Energy Systems and Technologies (SEST), None

A microgrid is a group of distributed energy resources (energy generation and/or storage systems) prepared to meet the energy demand for which it has been designed. Microgrids can act in isolation or connected to the distribution network. This document presents a preliminary methodology to perform a Diagnosis and Online Failure Mitigation procedure in an experimental microgrid located at the laboratory ...


Numerical Modelling of Interference from AC Power Lines on Buried Metallic Pipelines in Presence of Mitigation Wires

[{u'author_order': 1, u'affiliation': u'Department of Electrical, Electronic, and Information Engineering, University of Bologna, Bologna, Italy, I-40136', u'full_name': u'Andrea Cristofolini'}, {u'author_order': 2, u'affiliation': u'Department of Electrical, Electronic, and Information Engineering, University of Bologna, Bologna, Italy, I-40136', u'full_name': u'Arturo Popoli'}, {u'author_order': 3, u'affiliation': u'Department of Electrical, Electronic, and Information Engineering, University of Bologna, Bologna, Italy, I-40136', u'full_name': u'Leonardo Sandrolini'}] 2018 IEEE International Conference on Environment and Electrical Engineering and 2018 IEEE Industrial and Commercial Power Systems Europe (EEEIC / I&CPS Europe), None

This paper presents a numerical approach based on the finite element method for the estimation of AC interference on buried metallic pipelines sharing the same right-of-way of power transmission lines in presence of mitigation wires. The proposed approach relies on a hybrid technique in order to reduce the mesh size and, in turn, the computational time. The feasibility of the ...


Challenges and Mitigation of Cyber Threat in Automated Vehicle: An Integrated Approach

[{u'author_order': 1, u'affiliation': u'Department of Civil and Architectural Engineering, College of Engineering, Qatar University', u'full_name': u'Abdullah Al Mamun'}, {u'author_order': 2, u'affiliation': u'Department of Computer Science & Engineering, College of Engineering, Qatar University', u'full_name': u'Md. Abdullah Al Mamun'}, {u'author_order': 3, u'affiliation': u'KINDI Center for Computing Research, College of Engineering, Qatar University', u'full_name': u'Abdullatif Shikfa'}] 2018 International Conference of Electrical and Electronic Technologies for Automotive, None

The technological development of automated vehicles opens novel cybersecurity threats and risks for road safety. Increased connectivity often results in increased risks of a cyber-security attacks, which is one of the biggest challenges for the automotive industry that undergoes a profound transformation. State of the art studies evaluated potential attacks and recommended possible measures, from technical and organizational perspective to ...


Radio Frequency Interference due to Gigahertz On-die Clock and Package/Board-level Mitigation in Mobile Computer Applications

[{u'author_order': 1, u'affiliation': u'Client Computing Group Intel Corporation, Hillsboro, OR, 97124, USA', u'full_name': u'Jaejin Lee'}, {u'author_order': 2, u'affiliation': u'Client Computing Group Intel Corporation, Hillsboro, OR, 97124, USA', u'full_name': u'Hao\u2013han Hsu'}, {u'author_order': 3, u'affiliation': u'Client Computing Group Intel Corporation, Hillsboro, OR, 97124, USA', u'full_name': u'Dong\u2013ho Han'}, {u'author_order': 4, u'affiliation': u'Client Computing Group Intel Corporation, Hillsboro, OR, 97124, USA', u'full_name': u'Juan Zeng'}, {u'author_order': 5, u'affiliation': u'Client Computing Group Intel Corporation, Hillsboro, OR, 97124, USA', u'full_name': u'Chung\u2013hao Chen'}] 2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI), None

WiFi radio frequency interference (RFI) caused by a 5.76-GHz on-die clock is investigated. It is demonstrated that gigahertz on-die clocks that have no conductive connections to the package and board can introduce significant radio performance degradation to mobile devices. Conventional RFI mitigation approaches focus on megahertz and below GHz. The 5.76-GHz RFI noise mitigation solutions are investigated in package and ...


Inductor Energy Reduction Schemes for Overshoot Mitigation in Voltage Regulators

[{u'author_order': 1, u'affiliation': u'Intel Corporation, Client Computing Group', u'full_name': u'Sameer Shekhar'}, {u'author_order': 2, u'affiliation': u'Intel Corporation, Client Computing Group', u'full_name': u'Amit K. Jain'}, {u'author_order': 3, u'affiliation': u'Intel Corporation, Client Computing Group', u'full_name': u'Alexander Waizman'}, {u'author_order': 4, u'affiliation': u'Intel corporation, Platform Engineering Group', u'full_name': u'Michael Zeliksorn'}, {u'author_order': 5, u'affiliation': u'Intel Corporation, Client Computing Group', u'full_name': u'Chin Lee Kuan'}] 2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI), None

High current voltage regulators for microelectronic loads like microprocessors and field programmable gate arrays have stringent overshoot requirements due to reliability and performance implications. Toward this end this paper presents two novel inductor energy reduction schemes for overshoot mitigation. In first scheme inductor energy is transferred to load capacitance in a physically adjacent domain via an inter-domain switch. Results show ...


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Educational Resources on Mitigation

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eLearning

No eLearning Articles are currently tagged "Mitigation"

IEEE-USA E-Books

  • Interference Mitigation in Cognitive Radio‐Based LTE Femtocells

    Wireless communication has involved relentless years of research and design and comprises cellular telephony, broadcast and satellite television, wireless networking to today's 3rd Generation Partnership Project (3GPP) and Long Term Evolution (LTE) technology. This chapter examines interference mitigation in femtocells using cognitive radio (CR) and provides comprehensive survey of different CR enabled interference mitigation schemes. It introduces femtocells and different types of interference challenges experienced by them. Femtocell provides the solution to poor indoor coverage in cellular communication, which has hugely attracted network operators and stakeholders. The chapter presents various deployment modes of femtocells and issues related to interference versus deployment. It also presents the analysis of interference mitigation schemes using CR. The chapter highlights trade‐offs and cost of using CR in femtocells with some insight into future research issues and challenges.

  • Wireless Channel Impairment Mitigation Techniques

    Wireless channels cause many types of wireless channel impairments such as noise, path loss, shadowing, and fading, and wireless communication systems should be designed to overcome these wireless channel impairments. This chapter investigates the fundamentals of wireless channel impairment mitigation techniques. Diversity techniques mitigate multipath fading effects and improve the reliability of a signal by utilizing multiple received signals with different characteristics. C. Shannon predicts that it is possible to transmit information without errors over the unreliable channel and an error control coding technique exists to achieve this. Multiple Input Multiple Output (MIMO) techniques are classified into spatial diversity techniques, spatial multiplexing techniques, and beamforming techniques. Due to a time dispersive channel by multipath fading, Inter‐Symbol Interference (ISI) occurs and an equalizer plays an important role in ISI compensation. The Orthogonal Frequency Division Multiplexing (OFDM) system also has many advantages.

  • Interference Mitigation in Satellite Communications

    One of the major concerns in the design and performance of satellite communications links is the possible effects of interference on the communications link. This chapter reviews the types of interference affecting satellite communications and provides several specific analysis tools and parameters used to quantify interference and mitigate its effects on system performance. Understanding the source of the interference is the first step in developing mitigation techniques for interference avoidance or reduction. Interference signals can be introduced to the satellite system through several propagation conditions (or mechanisms) that may be present in the region of the satellite link. The presence of unwanted signals on the radio frequency (RF) link produces the potential for interference degradations on the performance of the satellite network. The primary parameter involved in the evaluation of interference is the power flux density (pfd).

  • Multiple Access Schemes and Inter‐cell Interference Mitigation Techniques

    This chapter contains sections titled: Introduction Multiple Access Schemes Inter‐cell Interference Mitigation Schemes Conclusion Acknowledgements References

  • Rain Fade Mitigation

    Space communications systems operating above 10 GHz are subject to weather dependent path attenuation, primarily rain attenuation, which can be severe for significant time periods. Fixed line‐of‐site satellite restoration techniques can be divided into two types or classes: power restoral and signal modification restoral. This chapter reviews several restoration techniques, of both types, available to the systems designer for overcoming severe attenuation conditions on earth‐space links. It discusses the power restoral techniques, listing in approximate order of increasing complexity of implementation, beam diversity, power control, site diversity, and orbit diversity. The second general type of link restoral involves the modification of the communications signal characteristics to realize performance improvement in the presence of link fading and other path degradations. The chapter discusses the following signal modification restoral techniques namely frequency diversity, bandwidth reduction, time diversity, adaptive forward error correction, and adaptive coded modulation (ACM).

  • Error Mitigation Techniques

    This chapter contains sections titled: Introduction System Model NLOS Scenarios: Fundamental Limits and ML Solutions Least‐squares Techniques for NLOS Localization Constraint‐based Techniques for NLOS Localization Robust Estimators for NLOS Localization Identify and Discard Techniques for NLOS Localization Conclusions

  • Communications/Information System Issues, Technical Risks, and Risk Mitigation

    This chapter contains sections titled: Hardware and Software Requirements Communications and QoS Requirements Security Issues and Challenges Game Crashes, Checkpoints, and Crash Recovery Shadow/Run Ahead Games Backups and Archives Networking Service Outages and Other Reasons for Failure Review Questions

  • Rain Fade Mitigation

    This chapter contains sections titled: Power Restoral Techniques Signal Modification Restoral Techniques Summary References Problems

  • Error Mitigation Techniques

    This chapter provides a comprehensive and up‐to‐date survey of non‐line‐of‐sight (NLOS) mitigation techniques for wireless location estimation. It outlines the time of arrival (TOA)‐based localization scenario and presents a brief overview of the fundamental lower bounds in line‐of‐sight (LOS) scenarios. NLOS scenarios occur when there is an obstruction between the transmitter (TX) and the receiver (RX), and are commonly encountered in modern wireless system deployment in both indoor environments. The chapter then summarizes some of the key techniques based on the maximum likelihood (ML) method, which can achieve accuracies close to these fundamental bounds. It also provides lower bounds and some ML techniques for localization in NLOS scenarios. The chapter focuses on least‐squares (LS) techniques, constraint‐based techniques and robust estimators. It tabulates an overview of TOA‐based localization algorithms for use in LOS and NLOS scenarios.

  • Overview of Whisker¿¿¿Mitigation Strategies for High¿¿¿Reliability Electronic Systems

    In practice, management of the risks associated with tin whiskering is not fundamentally different from managing risks associated with other failure modes that bedevil electronic systems. However, the underlying uncertainties and associated lack of predictability of the tin whiskering phenomenon create a challenging environment for risk management. In order to reduce failure risk presented by tin whiskers, electronic equipment manufacturers need to understand various mitigation strategies and their effectiveness at preventing whisker¿¿¿related failures. Equipment manufacture mitigation strategies may include setting spacing limits, hot solder dipping, solder assembly and inspection, encapsulation, or application of an insulation coating layer. Appropriate supply chain management will vary depending upon the willingness of the supplier to implement special tin controls and level of complexity of the purchased item, that is, components, simple assemblies, major subassemblies, etc. Effective and efficient tin whisker risk mitigation requires each tier of the supply chain to play its proper role.



Standards related to Mitigation

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IEEE Guide for Animal Deterrents for Electric Power Supply Substations


IEEE Guide for Detection, Mitigation, and Control of Concentric Neutral Corrosion in Medium-Voltage Underground Cables

The primary focus of this guide is unjacketed, underground distribution cable installed direct buried or in conduit. The causes of corrosion in cable concentric neutral wires and straps and the methods available to detect this corrosion are described. The purpose of the concentric neutral and consequences of significant loss of the concentric neutral are discussed. Recommendations are made for the ...


IEEE Guide for the Implementation of Inductive Coordination Mitigation Techniques and Application

This Guide offers users assistance in controlling or modifying the inductive environment and the susceptibility of affected wire-line telecommunications facilities in order to operate within acceptable levels of steady-state or surge-induced voltage of the environmental interface (probe wire) defined by IEEE Srd 776. The methodology, application, and evaluation of results for mitigative techniques or devices in general are addressed for ...


IEEE Guide for the Implementation of Inductive Coordination Mitigation Techniques and Application

This Guide offers users assistance in controlling or modifying the inductive environment and the susceptibility of affected wire-line telecommunications facilities in order to operate within acceptable levels of steady-state or surge-induced voltage of the environmental interface (probe wire) defined by IEEE Srd 776. The methodology, application, and evaluation of results for mitigative techniques or devices in general are addressed for ...