Conferences related to Pipeline

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2017 IEEE Petroleum and Chemical Industry Technical Conference (PCIC 2017)

The PCIC provides an international forum for the exchange of electrical applications technology related to the petroleum and chemical industry. The PCIC annual conference is rotated across North American locations of industry strength to attract national and international participation.

  • 2018 IEEE Petroleum and Chemical Industry Technical Conference (PCIC)

    The PCIC provides an international forum for the exchange of electrical applications technology related to the petroleum and chemical industry. The PCIC annual conference is rotated across North American locations of industry strength to attract national and international participation. User, manufacturer, consultant, and contractor participation is encouraged to strengthen the conference technical base. Success of the PCIC is built upon high quality papers, individual recognition, valued standards activities, mentoring, tutorials, networking, and conference sites that appeal to all.

  • 2016 IEEE Petroleum and Chemical Industry Technical Conference (PCIC 2016)

    To provide an international forum for the exchange or electrical application technology relating to the petroleum and chemical industry, to sponsor appropriate IEEE standards activity for that industry, and to provide opportunity for professional development.

  • 2014 IEEE Petroleum and Chemical Industry Technical Conference (PCIC)

    The mission of IEEE-PCIC is to provide an international forum for the exchange of electrical applications technology relating to the petroleum, chemical and marine industry, to sponsor appropriate standards activities for that industry, and to provide opportunity for professional development.

  • 2013 IEEE Petroleum and Chemical Industry Technical Conference (PCIC 2013)

    Provide an inernational forum for the exchange of electrical applications technology related to the petroleum and chemical industry; to sponsor appropriate IEEE Standards activity for that industry and to provide opportunity for professional development

  • 2012 IEEE Petroleum and Chemical Industry Technical Conference (PCIC)

    To provide an international forum for the exchange of electrical applications technology relating to the petroleum and chemical industry, to sponsor appropriate IEEE Standards activity for that industry, and to provide opportunity for professional development.

  • 2011 IEEE Petroleum and Chemical Industry Technical Conference (PCIC 2011)

    To provide an international forum for the exchange of electrical applications technology relating to the petroleum and chemical industry, to sponsor appropriate IEEE Standards activity for that industry, and to provide opportunity for professional development.

  • 2010 IEEE Petroleum and Chemical Industry Technical Conference (PCIC 2010)

    To provide an international forum for the exchange of electrical applications technology relating to the petroleum and chemical industry, to sponsor appropriate IEEE Standards activity for that industry, and to provide opportunity for professional development.


2013 21st International Conference on Geoinformatics

GIS in Regional Economic Development and Environmental Protection under Globalization


2013 International Conference on Management Science and Engineering (ICMSE)

Management science and engineering, including operations research, organizational systems and behavior, economics and finance, and public administration.


2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)

Oral and poster sessions, student paper contest, tutorials and special sessions in: Analog, Digital and Mixed-Signal Circuits; Signal Processing and communication; Embedded System Architectures; Programmable logic; VLSI; Nanoelectronics ; RF, Microwave, and Optical/Photonics Systems; Neural Networks, Neuromorphic Circuits and Fuzzy Systems; Control Systems; Power Electronics; Bioengineering Circuits ; and MEMS/NEMS.

  • 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

    MWSCAS 2011 will include oral and poster sessions; student contest; tutorials and special sessions. Topics include: Analog and Digital Circuits and Signal Processing, Computer Arithmetic, Programmable logic, VLSI, CAD, Nonlinear Circuits, Nanotechnology, Communication, Wireless Systems, Embedded Electronics, Image Processing, RF, Microwave, Optical Systems, Neural Networks, Control Systems, Robotics, Power Systems and Electronics, Bioengineering Circuits, Architectures, Innovative Technologies, MEMS/NEMS.

  • 2010 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

    MWSCAS is the oldest Circuits and Systems symposium that provides a forum for presenting novel analog, digital, power electronics and other circuits and systems.

  • 2009 52nd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

    The 2009 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2009) will be held at the Hotel Fiesta Americana Condesa located in the paradisiac place of Cancun, Quintana Roo, Mexico, on August 2-5, 2009. This will be the 52nd symposium in the longest line of Circuits and Systems symposiums sponsored by the IEEE Circuits and Systems Society. The Symposium will be devoted to all aspects of the theory, design, and applications of Circuits and Systems.

  • 2008 51st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

    MWSCAS is the oldest Circuits and Systems conference sponsored by the IEEE. The conference will include regular and special sessions on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of theory, design and applications of electronic systems, as well as tutorials.

  • 2007 Joint 50th IEEE Intl. Midwest Symposium on Circuits and Systems (MWSCAS) and the IEEE North-East Workshop on Circuits and Systems (NEWCAS)

  • 2006 49th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)


2011 9th International Conference on Reliability, Maintainability and Safety (ICRMS 2011)

ICRMS 2011 is to bring together leading academics, industry practitioners, and research scientists from around the world to advance the body of knowledge in quality, reliability, maintenance, and safety of engineering systems, to establish and strengthen the link between academia and industry, to promote applications of research results.

  • 2009 8th International Conference on Reliability, Maintainability and Safety (ICRMS 2009)

    The topics of ICRMS 2009 include reliability, maintainability, testability, supportability and safety, which concern astronautics, aeronautics, military equipment, automobile, communication, computer network, electronics, automation instrument, etc. The researchers are from different countries, including USA, Canada, Japan, Norway, Sweden, France, Iran, Italy, Poland, UK, Russia, South Korea, Lithuania, Austria, etc.


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Periodicals related to Pipeline

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Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.




Xplore Articles related to Pipeline

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10b 25 MS/s pipelined SAR ADC with dual- phase zero-crossing detector

Pengcheng Yan; Yan Song; Peipei Ran; Li Geng 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2014

A successive approximation register (SAR)-assisted two-stage pipeline ADC is presented, achieving low power consumption, high resolution and high speed. A dual-phase zero-crossing detector is used to replace the power-hungry OTA- based MDAC. Since the SAR architecture and zero-crossing circuit are proved to be voltage scalable, this ADC will be benefited from the technology scaling. Simulation results show that the ADC ...


Pipelined parallel architecture for high throughput MAP detectors

R. Ratnayake; Gu-Yeon Wei; A. Kavcic 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), 2004

A maximum a posteriori probability (MAP) detector based on a forward only algorithm with high throughput is considered in this paper. MAP gives the optimal performance and, with Turbo decoding, can achieve performance close to the channel capacity limits. Deep pipelined architecture for the forward only method is presented and compared with the other throughput-increasing methods. Simulation results based on ...


Architecture and Software Implementation of HDTV Video Decoder on a Singlechip, MPEG Decoder

Yuhuang Ye; Yuanjiu Li; Kaixiong Su International Conference on Computer Graphics, Imaging and Visualisation (CGIV'06), 2006

This paper presents the architecture and software design of HDTV video decoder on a 200-MHz single-chip microprocessor. First, the paper analyzes the hardware architecture of video decoder system on this MPEG decoder and describes the function of each module in this system, including the PES parser, decode pipeline, SC analyzer, and display processor. Then it gives the software control and ...


Tuning a Finite Difference Computation for Parallel Vector Processors

Gerhard Zumbusch 2012 11th International Symposium on Parallel and Distributed Computing, 2012

Current CPU and GPU architectures heavily use data and instruction parallelism at different levels. Floating point operations are organised in vector instructions of increasing vector length. For reasons of performance it is mandatory to use the vector instructions efficiently. Several ways of tuning a model problem finite difference stencil computation are discussed. The combination of vectorisation and an interleaved data ...


VLSI implementation of pipelined linear system solver

I. -C. Jou; S. -C. Tsay; C. -Y. Tseng; R. -Y. Liu 1988., IEEE International Symposium on Circuits and Systems, 1988

A linear rotation-based algorithm without pivoting for solving linear system equations of the form Ax=b is presented. This algorithm modifies the conventional Gaussian elimination method and avoids the problems of numerical singularity and ill conditioning. It is shown that this algorithm can be implemented with a trapezoid-type array with n2/2+(n-2) processors, and a linear array with n processors, where n ...


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Educational Resources on Pipeline

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eLearning

10b 25 MS/s pipelined SAR ADC with dual- phase zero-crossing detector

Pengcheng Yan; Yan Song; Peipei Ran; Li Geng 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2014

A successive approximation register (SAR)-assisted two-stage pipeline ADC is presented, achieving low power consumption, high resolution and high speed. A dual-phase zero-crossing detector is used to replace the power-hungry OTA- based MDAC. Since the SAR architecture and zero-crossing circuit are proved to be voltage scalable, this ADC will be benefited from the technology scaling. Simulation results show that the ADC ...


Pipelined parallel architecture for high throughput MAP detectors

R. Ratnayake; Gu-Yeon Wei; A. Kavcic 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), 2004

A maximum a posteriori probability (MAP) detector based on a forward only algorithm with high throughput is considered in this paper. MAP gives the optimal performance and, with Turbo decoding, can achieve performance close to the channel capacity limits. Deep pipelined architecture for the forward only method is presented and compared with the other throughput-increasing methods. Simulation results based on ...


Architecture and Software Implementation of HDTV Video Decoder on a Singlechip, MPEG Decoder

Yuhuang Ye; Yuanjiu Li; Kaixiong Su International Conference on Computer Graphics, Imaging and Visualisation (CGIV'06), 2006

This paper presents the architecture and software design of HDTV video decoder on a 200-MHz single-chip microprocessor. First, the paper analyzes the hardware architecture of video decoder system on this MPEG decoder and describes the function of each module in this system, including the PES parser, decode pipeline, SC analyzer, and display processor. Then it gives the software control and ...


Tuning a Finite Difference Computation for Parallel Vector Processors

Gerhard Zumbusch 2012 11th International Symposium on Parallel and Distributed Computing, 2012

Current CPU and GPU architectures heavily use data and instruction parallelism at different levels. Floating point operations are organised in vector instructions of increasing vector length. For reasons of performance it is mandatory to use the vector instructions efficiently. Several ways of tuning a model problem finite difference stencil computation are discussed. The combination of vectorisation and an interleaved data ...


VLSI implementation of pipelined linear system solver

I. -C. Jou; S. -C. Tsay; C. -Y. Tseng; R. -Y. Liu 1988., IEEE International Symposium on Circuits and Systems, 1988

A linear rotation-based algorithm without pivoting for solving linear system equations of the form Ax=b is presented. This algorithm modifies the conventional Gaussian elimination method and avoids the problems of numerical singularity and ill conditioning. It is shown that this algorithm can be implemented with a trapezoid-type array with n2/2+(n-2) processors, and a linear array with n processors, where n ...


More eLearning Resources

IEEE-USA E-Books

  • SelfTimed Pipelines

    This chapter contains sections titled: Introduction Individual Stages Definitions Self-Timed Control Interconnections Overall Pipeline Latency and Throughput Applications Margin, Testing, and Power Issues Conclusion This chapter contains sections titled: References

  • Dedicated and Programmable Digital Signal Processors

    This chapter contains sections titled: A Low-Power Chipset for a Portable Multimedia I/O Terminal A Portable Real-Time Video Decoder for Wireless Communication Low Power Design of Memory Intensive Functions A 16b Low-Power Digital Signal Processor A 1.8V 36mW DSP for the Half-Rate Speech CODEC Design of a 1-V Programmable DSP for Wireless Communication Stage-Skip Pipeline: A Low Power Processor Architecture Using a Decoded Instruction Buffer

  • Proofs and Derivations

    This chapter contains sections titled: ListToTree and TreeToList, simple versions, ListToTree and TreeToList, shuffled versions, Turning recurrences into cyclic networks, The ray-tracer pipeline, The sieve of Eratosthenes, Transforming divide-and-conquer into a cycle

  • Specifying and Deriving Parallel Algorithms

    This chapter contains sections titled: Horizontal and vertical parallelism, Divide-and-conquer parallelism, Pipeline parallelism, The Kahn principle, Parameter-dependent process networks, Infinite process networks, Process networks as hardware descriptions, Divide-and-conquer using a process network, Application to ray tracing, Conclusions, Pointers into the literature

  • Chained Boosting

    We describe a method to learn to make sequential stopping decisions, such as those made along a processing pipeline. We envision a scenario in which a series of decisions must be made as to whether to continue to process. Further processing costs time and resources, but may add value. Our goal is to create, based on historic data, a series of decision rules (one at each stage in the pipeline) that decide, based on information gathered up to that point, whether to continue processing the part. We demonstrate how our framework encompasses problems from manufacturing to vision processing. We derive a quadratic (in the number of decisions) bound on testing performance and provide empirical results on object detection.

  • Architecting Area

    This chapter contains sections titled: Rolling Up the Pipeline Control-Based Logic Reuse Resource Sharing Impact of Reset on Area Summary of Key Points

  • Recognition and Pose Estimation of Rigid Transparent Objects with a Kinect Sensor

    Recognizing and determining the 6DOF pose of transparent objects is necessary in order for robots to manipulate such objects. However, it is a challenging problem for computer vision. We propose new algorithms for segmentation, pose estimation and recognition of transparent objects from a single RGB-D image from a Kinect sensor. Kinect's weakness in the perception of transparent objects is exploited in their segmentation. Following segmentation, edge fitting is used for recognition and pose estimation. A 3D model of the object is created automatically during training and it is required for pose estimation and recognition. The algorithm is evaluated in different conditions of a domestic environment within the framework of a robotic grasping pipeline where it demonstrates high grasping success rates compared to the state-of- the-art results. The method doesn't deal with occlusions and overlapping transparent objects currently but it is robust against non-transparent clutter.

  • No title

    As new displays and cameras offer enhanced color capabilities, there is a need to extend the precision of digital content. High Dynamic Range (HDR) imaging encodes images and video with higher than normal 8 bit-per-color-channel precision, enabling representation of the complete color gamut and the full visible range of luminance.However, to realize transition from the traditional toHDRimaging, it is necessary to develop imaging algorithms that work with the high-precision data. Tomake such algorithms effective and feasible in practice, it is necessary to take advantage of the limitations of the human visual system by aligning the data shortcomings to those of the human eye, thus limiting storage and processing precision. Therefore, human visual perception is the key component of the solutions we discuss in this book. This book presents a complete pipeline forHDR image and video processing fromacquisition, through compression and quality evaluation, to display. At the HDR image and vi eo acquisition stage specialized HDR sensors or multi- exposure techniques suitable for traditional cameras are discussed. Then, we present a practical solution for pixel values calibration in terms of photometric or radiometric quantities, which are required in some technically oriented applications. Also, we cover the problem of efficient image and video compression and encoding either for storage or transmission purposes, including the aspect of backward compatibility with existing formats. Finally, we review existing HDR display technologies and the associated problems of image contrast and brightness adjustment. For this purpose tone mapping is employed to accommodate HDR content to LDR devices. Conversely, the so-called inverse tone mapping is required to upgrade LDR content for displaying on HDR devices. We overview HDR-enabled image and video quality metrics, which are needed to verify algorithms at all stages of the pipeline. Additionally, we cover successful examples of the H R technology applications, in particular, in computer graphics and computer vision. The goal of this book is to present all discussed components of the HDR pipeline with the main focus on video. For some pipeline stages HDR video solutions are either not well established or do not exist at all, in which case we describe techniques for single HDR images. In such cases we attempt to select the techniques, which can be extended into temporal domain. Whenever needed, relevant background information on human perception is given, which enables better understanding of the design choices behind the discussed algorithms and HDR equipment. Table of Contents: Introduction / Representation of an HDR Image / HDR Image and Video Acquisition / HDR Image Quality / HDR Image, Video, and Texture Compression / Tone Reproduction / HDR Display Devices / LDR2HDR: Recovering Dynamic Range in Legacy Content / HDRI in Computer Graphics / Software

  • No title

    Geometric programming is used for design and cost optimization, the development of generalized design relationships, cost ratios for specific problems, and profit maximization. The early pioneers of the process - Zener, Duffin, Peterson, Beightler, Wilde, and Phillips -- played important roles in the development of geometric programming. There are three major areas: 1) Introduction, History, and Theoretical Fundamentals, 2) Applications with Zero Degrees of Difficulty, and 3) Applications with Positive Degrees of Difficulty. The primal-dual relationships are used to illustrate how to determine the primal variables from the dual solution and how to determine additional dual equations when the degrees of difficulty are positive. A new technique for determining additional equations for the dual, Dimensional Analysis, is demonstrated. The various solution techniques of the constrained derivative approach, the condensation of terms, and dimensional analysis are illustrated with example pro lems. The goal of this work is to have readers develop more case studies to further the application of this exciting tool. Table of Contents: Introduction / Brief History of Geometric Programming / Theoretical Considerations / The Optimal Box Design Case Study / Trash Can Case Study / The Open Cargo Shipping Box Case Study / Metal Casting Cylindrical Riser Case Study / Inventory Model Case Study / Process Furnace Design Case Study / Gas Transmission Pipeline Case Study / Profit Maximization Case Study / Material Removal/Metal Cutting Economics Case Study / Journal Bearing Design Case Study / Metal Casting Hemispherical Top Cylindrical Side Riser\Case Study / Liquefied Petroleum Gas (LPG) Cylinders Case Study / Material Removal/Metal Cutting Economics with Two Constraints / The Open Cargo Shipping Box with Skids / Profit Maximization Considering Decreasing Cost Functions of Inventory Policy / Summary and Future Directions / Thesis and Dissertations on Geometric Programming

  • Industrial Case: Acquiring Software for Pipeline Operations

    The goal of this chapter is to discuss developing software requirements for a safety critical system using multidisciplinary team approaches. Such specifications are systems oriented in that they address functional, performance, and hardware/software interface requirements. The chapter also identifies some of the best practices for use in specifying requirements. There is a wealth of resources available on the topic of requirements because of its importance and due to the challenges associated with specifying them and getting them right. The chapter touches on just a few of the important issues and identifies a few of the readily available resources.



Standards related to Pipeline

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No standards are currently tagged "Pipeline"