Conferences related to Network-on-chip

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2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)

NEWCAS2018 will encompass a wide range of special sessions and keynote talks given by prominent expertscovering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequency circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, device modeling, and embedded portable devices.

  • 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequqncy circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, and embedded portable devices.

  • 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)

    The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared among the organizing entities. This collaboration will be oriented towards advanced research in adaptive systems which constitutes the highlights of the NEWCAS conference, but also areas related to analog and digital signal processing, low power consumption, and circuits and systems designs. The topics include, but are not limited to: Computer architecture and memories, Analog circuit design, Digital and mixed-signal circuit design, RF circuit design, Microsystems, sensors and actuators, Test and verification, Telecom, microwaves and RF, Technology Trends, Data and signal processing, Neural networks and artificial vision, CAD and design tools, Low-Power circ. & syst. techniques, Imaging & image sensors, Embedded hand-held devices, Biomed. circuits & systems, Energy Harvesting / Scavenging

  • 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

    will encompass a wide range of special sessions and keynote talks given by prominent experts covering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2010 8th IEEE International NEWCAS Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2009 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2009)

    Advance in microelectronics in addition to signal analog processing, and their applications to telecommunications, artificial vision and biomedical. This include: system architectures, circuit (digital, analog and mixed) and system-level design, test and verification, data and signal processing, microsystems, memories and sensors and associated analog processing, mathematical methods and design tools.

  • 2008 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2008)

    Advanced research in microelectronics and microsystems constitutes the highlights of the NEWCAS conferences in addition to topics regarding analog data and signal processing and their applications well-established in the TAISA conferences.

  • 2006 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006)

  • 2005 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2005)

  • 2004 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2004)


2018 19th International Symposium on Quality Electronic Design (ISQED)

19th International Symposium on Quality Electronic Design (ISQED 2018) is the premier interdisciplinary and multidisciplinary Electronic Design conference?bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integratedcircuit technologies, semiconductor technology,packaging, assembly & test to achieve design quality.


2018 31st IEEE International System-on-Chip Conference (SOCC)

System on Chip


2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

The International Symposium on Microarchitecture (MICRO) is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in the fields of microarchitecture, compilers, and systems for technical exchange. The MICRO community has enjoyed having close interaction between academic researchers and industrial designers.

  • 2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the forum for presentation and discussion of new ideas in microarchitectures, compilers, hardware/software interfaces, and design of advanced computing and communication systems.

  • 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the forum for presentation and discussion of new ideas in microarchitectures, compilers, hardware/software interfaces, and design of advanced computing and communication systems.

  • 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction betweenacademic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture,compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging researchareas.

  • 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction betweenacademic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture,compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging researchareas.

  • 2013 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction between academic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture, compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging research areas.

  • 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques for advanced computing and communication systems, providing a close interaction between academic researchers and industrial designers and bringing together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas.

  • 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    The International Symposium on Microarchitecture (MICRO) is the premier forum for presenting, discussing, and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goals of this symposium are to bring together researchers in fields related to microarchitecture, compilers, and systems for technical exchange on traditional microarchitectural topics as well as emerging research areas. Historically, the MICRO community has enjoyed having close interaction between academic researchers and industrial designers; we aim to continue and emphasize this tradition at MICRO-44.

  • 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO-43 is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2008 41st IEEE/ACM International Symposium on Microarchitecture (MICRO)

    The 41st International Symposium on Microarchitecture is the premier forum for presenting, discussing, and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, and systems for technical exchange on traditional microarchitectural topics and emerging research areas.

  • 2007 40th IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2006 39th IEEE/ACM International Symposium on Microarchitecture (MICRO)

  • 2005 38th IEEE/ACM International Symposium on Microarchitecture (MICRO)


2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


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Periodicals related to Network-on-chip

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems Magazine, IEEE


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Xplore Articles related to Network-on-chip

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Core/Task Associations for Efficient Application Implementation on Network-on-Chip

[{u'author_order': 1, u'affiliation': u'LIMPAF Laboratory Bouira University, Algeria', u'full_name': u'Maarnar Bougherara'}, {u'author_order': 2, u'affiliation': u'Ecole normale supérieure de kouba, Département d'Informatique, Algiers, Algeria', u'full_name': u'Nadia Nedjah'}, {u'author_order': 3, u'affiliation': u'LIMPAF Laboratory Bouira University, Algeria', u'full_name': u'Djamel Bennouar'}, {u'author_order': 4, u'affiliation': u'Ecole normale supérieure de kouba, Département d'Informatique, Algiers, Algeria', u'full_name': u'Rym Rahmoun'}, {u'author_order': 5, u'affiliation': u'Ecole normale supérieure de kouba, Département d'Informatique, Algiers, Algeria', u'full_name': u'Amel Sadok'}, {u'author_order': 6, u'affiliation': u'State University of Rio de, Department of Electronics Engineering and Telecommunications, Janeiro, Brazil', u'full_name': u'Luiza de macedo Mourelle'}] 2018 International Conference on Computer and Applications (ICCA), None

Network-on-chip (NoC) is considered the next generation of communication in embedded system. In this case, an application is implemented by a set of collaborative intellectual propriety blocks (IPs). The selection of the most suited block from a library of IPs is an NP-complete problem. In this paper, we use Multi-Objective Particle Swarm Optimization (MOPSO) to yield the best selection of ...


Network-on-Chip Multicast Architectures Using Hybrid Wire and Surface-Wave Interconnects

[{u'author_order': 1, u'affiliation': u'United Kingdom', u'full_name': u'Ammar Karkar'}, {u'author_order': 2, u'affiliation': u'Southampton, United Kingdom', u'full_name': u'Terrence Mak'}, {u'author_order': 3, u'affiliation': u'York, United Kingdom', u'full_name': u'Nizar Dahir'}, {u'author_order': 4, u'affiliation': u'United Kingdom', u'full_name': u'Ra\u2019ed Al-Dujaily'}, {u'author_order': 5, u'affiliation': u'London, United Kingdom', u'full_name': u'Kin-Fai Tong'}, {u'author_order': 6, u'affiliation': u'United Kingdom', u'full_name': u'Alex Yakovlev'}] IEEE Transactions on Emerging Topics in Computing, 2018

The network-on-chip (NoC) has been introduced as an efficient communication backbone to tackle the increasing challenges of on-chip communication. Nevertheless, merely metal-based NoC implementation offers only limited performance and power scalability in terms of multicast and broadcast traffics. To meet scalability demands, this paper addresses the system-level challenges for intra-chip multicast communication in a proposed hybrid interconnects architecture. This hybrid ...


An Energy-Efficient Network-on-Chip-Based Reconfigurable Viterbi Decoder Architecture

[{u'author_order': 1, u'affiliation': u'Department of Electronics and Electrical Communication Engineering, IIT Kharagpur, Kharagpur, India', u'full_name': u'N. Prasad'}, {u'author_order': 2, u'affiliation': u'Department of Electronics and Electrical Communication Engineering, IIT Kharagpur, Kharagpur, India', u'full_name': u'Indrajit Chakrabarti'}, {u'author_order': 3, u'affiliation': u'Department of Electronics and Electrical Communication Engineering, IIT Kharagpur, Kharagpur, India', u'full_name': u'Santanu Chattopadhyay'}] IEEE Transactions on Circuits and Systems I: Regular Papers, 2018

This paper presents an energy-efficient network-on-chip (NoC)-based multi-core architecture for realizing a reconfigurable Viterbi decoder (VD). The proposed architecture can support a wide range of wireless communication standards that have varied constraint lengths. The energy efficiency in the proposed architecture has been primarily achieved by mapping the add-compare-select operations of the VD onto a $4times 4$ ZMesh topology-based NoC and ...


AWAIT: An Ultra-Lightweight Soft-Error Mitigation Mechanism for Network-on-Chip Links

[{u'author_order': 1, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Karl Janson'}, {u'author_order': 2, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Rene Pihlak'}, {u'author_order': 3, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Siavoosh Payandeh Azad'}, {u'author_order': 4, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Behrad Niazmand'}, {u'author_order': 5, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Gert Jervan'}, {u'author_order': 6, u'affiliation': u'Department of Computer Systems, Tallinn University of Technology', u'full_name': u'Jaan Raik'}] 2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), None

Networks-on-Chip have become a widely accepted communication paradigm for many-core Systems-on-Chip. However, with the ever-shrinking transistor size, the network's sensitivity to transient faults on the physical links cannot be ignored since even a single transient fault can lead to a network-wide congestion and a system failure. This paper proposes the AWAIT mechanism, an ultra-lightweight transient fault mitigation mechanism for Network-on-Chip ...


Low-Latency Mapping Algorithm for Network-on-Chip

[{u'author_order': 1, u'affiliation': u'South China University of Technology, School of Electronic and Information Engineering, Guangzhou, China', u'full_name': u'Qinping Cao'}, {u'author_order': 2, u'affiliation': u'South China University of Technology, School of Electronic and Information Engineering, Guangzhou, China', u'full_name': u'Huabiao Qin'}, {u'author_order': 3, u'affiliation': u'South China University of Technology, School of Electronic and Information Engineering, Guangzhou, China', u'full_name': u'Wu Chen'}, {u'author_order': 4, u'affiliation': u'ALi Corporation, Zhuhai, China', u'full_name': u'Sijun Yi'}] 2017 International Conference on Computer Systems, Electronics and Control (ICCSEC), None

As a new generation of SoC design scheme, Network-on-Chip (NoC), is being adopted by more and more chips as communication architecture. In this paper, the N oC mapping problem is studied, and a low latency NoC mapping algorithm is proposed to reduce N oC communication latency in mapping specific applications to the N oC architecture. The algorithm reduces the communication ...


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IEEE-USA E-Books

  • The Chip Is the Network:Towards a Science of Network-on-Chip Design

    The Chip Is the Network: Towards a Science of Network-on-Chip Design reviews the major design methodologies that have had a profound effect on designing future Network-on-Chip (NoC) architectures. More precisely, it addresses the problem of NoC design in the deterministic context, where the application and the architecture are modeled as graphs with worst-case type of information about the parameters of the components influencing the network traffic. Rather than simply enumerating the proposed approaches, it takes a formal approach and also discusses the main features of each proposed solution. It then goes one step further by considering the design of NoCs with partial information available (primarily under the Markovian assumption) about the application and the architecture. Similarly to the deterministic context, it discusses various probabilistic approaches to NoC design and points out their advantages and limitations. Last, but not least, it looks at emerging approaches inspired rom statistical physics and information theory. The formal approach adopted means the network concept is addressed in the most general context, pointing out the main limitations of the proposed solutions, and suggesting a few open-ended problems. The Chip Is the Network: Towards a Science of Network-on-Chip Design is an invaluable reference for the NoC research community and, indeed anyone from CAD/VLSI academe or industry with an interest in this emerging paradigm.

  • A Reconfigurable On-Chip Interconnection Network for Large Multicore Systems

    This chapter introduces the baseline reconfigurable networks-on-chip (NoC) architecture. It addresses two problems of core to network mapping and topology exploration in which the cores of a given set of input applications are physically mapped to the network and then a suitable topology is found for each individual application. Experimental results, using some multicore system-on-chips (SoC) workloads, show that this architecture effectively improves the performance of NoCs by 29% and reduces the power consumption by 9% over one of the most efficient and popular mapping algorithms proposed for conventional NoCs. The chapter extends the baseline reconfigurable NoC to a generalized reconfigurable NoC architecture. This new cluster-based structure consists of several mesh clusters alongside a reconfigurable connection fabric that handles the intercluster communication. It can support both local and global traffic patterns in an efficient manner.

  • Time-Average-Frequency and Special Clocking Techniques: Gapped Clock, Stretchable Clock, and Pausible Clock

    Gapped clocking is a commonly used technique in optical transport networks (OTNs), broadcast video, and other applications. This chapter discusses the stretchable and pausible clock in connection with the application environment of a NoC (network-on-chip). The gapped clock is produced by removing pulses from a clock signal generated by an ?>untouchable?> clock source. The chapter also discusses the techniques, including the gapped clock, stretchable clock, pausible clock, and possible others all have the Time-Average-Frequency (TAF) concept work behind the scene. All these special clocking techniques illustrate the fact that the essence of clock frequency is the accomplishment of a specified number of operations within the time window of 1 s. An important topic related to the gapped clock, pausible clock, and stretched clock is clock jitter. It is crucial to understand that the pulse-length modification introduced by these special clocking techniques is an intended operation.

  • Application Platform

    This chapter contains sections titled: * SoC Design Paradigms * System Architecture * Low-power SoC Design * Network-on-Chip based SoC * References



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