Conferences related to Network-on-chip

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2018 16th IEEE International New Circuits and Systems Conference (NEWCAS)

NEWCAS2018 will encompass a wide range of special sessions and keynote talks given by prominent expertscovering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequency circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, device modeling, and embedded portable devices.

  • 2016 14th IEEE International New Circuits and Systems Conference (NEWCAS)

    IEEE International NEWCAS Conference is tailored to reflect the wide spectrum of topics and research interests shared among the organizing entities. This collaboration will be oriented towards advanced research and development activities from academia, research institutions, and industry. Topics include, but are not limited to analog, mixed-signal, and digital integrated circuits and systems, radio-frequqncy circuits, computer architecture and memories, microsystems, sensors and actuators, test and verification, telecommunication, technology trends, power and energy circuits and systems, biomedical circuits, energy harvesting, computer-aided design tools, and embedded portable devices.

  • 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)

    The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared among the organizing entities. This collaboration will be oriented towards advanced research in adaptive systems which constitutes the highlights of the NEWCAS conference, but also areas related to analog and digital signal processing, low power consumption, and circuits and systems designs. The topics include, but are not limited to: Computer architecture and memories, Analog circuit design, Digital and mixed-signal circuit design, RF circuit design, Microsystems, sensors and actuators, Test and verification, Telecom, microwaves and RF, Technology Trends, Data and signal processing, Neural networks and artificial vision, CAD and design tools, Low-Power circ. & syst. techniques, Imaging & image sensors, Embedded hand-held devices, Biomed. circuits & systems, Energy Harvesting / Scavenging

  • 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

    will encompass a wide range of special sessions and keynote talks given by prominent experts covering key areas of research in microsystems in order to provide all attendees a unique forum for the exchange of ideas and results. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared by researchers in this field.

  • 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2012 IEEE 10th International New Circuits and Systems Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2011 IEEE 9th International New Circuits and Systems Conference (NEWCAS)

    NEWCAS is a major international conference presenting design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. The NEWCAS conference deals with analog and digital signal processing, low power consumption, circuits and systems design.

  • 2010 8th IEEE International NEWCAS Conference (NEWCAS)

    The conference will include regular and special session on emerging electronic systems and design methods, plenary sessions on selected advanced aspects of the theory, design and applications of electronic systems, as well as tutorials given by experts on specific topics.

  • 2009 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2009)

    Advance in microelectronics in addition to signal analog processing, and their applications to telecommunications, artificial vision and biomedical. This include: system architectures, circuit (digital, analog and mixed) and system-level design, test and verification, data and signal processing, microsystems, memories and sensors and associated analog processing, mathematical methods and design tools.

  • 2008 Joint IEEE North-East Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA 2008)

    Advanced research in microelectronics and microsystems constitutes the highlights of the NEWCAS conferences in addition to topics regarding analog data and signal processing and their applications well-established in the TAISA conferences.

  • 2006 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2006)

  • 2005 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2005)

  • 2004 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2004)


2018 19th International Symposium on Quality Electronic Design (ISQED)

19th International Symposium on Quality Electronic Design (ISQED 2018) is the premier interdisciplinary and multidisciplinary Electronic Design conference?bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integratedcircuit technologies, semiconductor technology,packaging, assembly & test to achieve design quality.


2018 31st IEEE International System-on-Chip Conference (SOCC)

System on Chip


2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

The International Symposium on Microarchitecture (MICRO) is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in the fields of microarchitecture, compilers, and systems for technical exchange. The MICRO community has enjoyed having close interaction between academic researchers and industrial designers.

  • 2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the forum for presentation and discussion of new ideas in microarchitectures, compilers, hardware/software interfaces, and design of advanced computing and communication systems.

  • 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the forum for presentation and discussion of new ideas in microarchitectures, compilers, hardware/software interfaces, and design of advanced computing and communication systems.

  • 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction betweenacademic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture,compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging researchareas.

  • 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction betweenacademic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture,compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging researchareas.

  • 2013 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques foradvanced computing and communication systems, providing a close interaction between academic researchers andindustrial designers and bringing together researchers in fields related to microarchitecture, compilers, chips, andsystems for technical exchange on traditional microarchitecture topics and emerging research areas.

  • 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    Forum for presenting and discussing innovative microarchitecture ideas and techniques for advanced computing and communication systems, providing a close interaction between academic researchers and industrial designers and bringing together researchers in fields related to microarchitecture, compilers, chips, and systems for technical exchange on traditional microarchitecture topics and emerging research areas.

  • 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    The International Symposium on Microarchitecture (MICRO) is the premier forum for presenting, discussing, and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goals of this symposium are to bring together researchers in fields related to microarchitecture, compilers, and systems for technical exchange on traditional microarchitectural topics as well as emerging research areas. Historically, the MICRO community has enjoyed having close interaction between academic researchers and industrial designers; we aim to continue and emphasize this tradition at MICRO-44.

  • 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO-43 is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2008 41st IEEE/ACM International Symposium on Microarchitecture (MICRO)

    The 41st International Symposium on Microarchitecture is the premier forum for presenting, discussing, and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. This symposium brings together researchers in fields related to microarchitecture, compilers, and systems for technical exchange on traditional microarchitectural topics and emerging research areas.

  • 2007 40th IEEE/ACM International Symposium on Microarchitecture (MICRO)

    MICRO is the premier forum for presenting, discussing and debating new and innovative microarchitecture ideas and techniques for advanced computing and communication systems. The goal of this symposium is to bring together researchers in fields related to processor architecture, compilers, and systems, for technical exchange on traditional MICRO topics as well as new emerging research areas.

  • 2006 39th IEEE/ACM International Symposium on Microarchitecture (MICRO)

  • 2005 38th IEEE/ACM International Symposium on Microarchitecture (MICRO)


2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)

The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2022 59th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2021 58th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2020 57th ACM/ESDA/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2019 56th ACM/ESDA/IEEE Design Automation Conference (DAC)

    EDA (Electronics Design Automation) is becoming ever more important with the continuous scaling of semiconductor devices and the growing complexities of their use in circuits and systems. Demands for lower-power, higher-reliability and more agile electronic systems raise new challenges to both design and design automation of such systems. For the past five decades, the primary focus of research track at DAC has been to showcase leading-edge research and practice in tools and methodologies for the design of circuits and systems.

  • 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC Description for TMRF The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 sessions on design methodologies and EDA tool developments, keynotes, panels, plus the NEW User Track presentations. A diverse worldwide community representing more than 1,000 organizations attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading

  • 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The world's premier EDA and semiconductor design conference and exhibition. DAC features over 60 session on design methodologies and EDA tool developments, keynotes, panels, plus User Track presentations. A diverse worldwide community representing more than 1,000 organization attends each year, from system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities.

  • 2012 49th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers

  • 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference is the world s leading technical conference and tradeshow on electronic design and design automation. DAC is where the IC Design and EDA ecosystem learns, networks, and does business.

  • 2010 47th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 200 of the leading electronics design suppliers.

  • 2009 46th ACM/EDAC/IEEE Design Automation Conference (DAC)

    DAC is the premier event for the electronic design community. DAC offers the industry s most prestigious technical conference in combination with the biggest exhibition, bringing together design, design automation and manufacturing market influencers.

  • 2008 45th ACM/EDAC/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.

  • 2007 44th ACM/IEEE Design Automation Conference (DAC)

    The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

  • 2006 43rd ACM/IEEE Design Automation Conference (DAC)

  • 2005 42nd ACM/IEEE Design Automation Conference (DAC)

  • 2004 41st ACM/IEEE Design Automation Conference (DAC)

  • 2003 40th ACM/IEEE Design Automation Conference (DAC)

  • 2002 39th ACM/IEEE Design Automation Conference (DAC)

  • 2001 38th ACM/IEEE Design Automation Conference (DAC)

  • 2000 37th ACM/IEEE Design Automation Conference (DAC)

  • 1999 36th ACM/IEEE Design Automation Conference (DAC)

  • 1998 35th ACM/IEEE Design Automation Conference (DAC)

  • 1997 34th ACM/IEEE Design Automation Conference (DAC)

  • 1996 33rd ACM/IEEE Design Automation Conference (DAC)


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Periodicals related to Network-on-chip

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Biomedical Circuits and Systems, IEEE Transactions on

The Transactions on Biomedical Circuits and Systems addresses areas at the crossroads of Circuits and Systems and Life Sciences. The main emphasis is on microelectronic issues in a wide range of applications found in life sciences, physical sciences and engineering. The primary goal of the journal is to bridge the unique scientific and technical activities of the Circuits and Systems ...


Circuits and Systems Magazine, IEEE


Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


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Most published Xplore authors for Network-on-chip

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Xplore Articles related to Network-on-chip

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Wireless network-on-chip: a survey

[{u'author_order': 1, u'affiliation': u"Nanjing University, People's Republic of China", u'full_name': u'Shuai Wang'}, {u'author_order': 2, u'affiliation': u"Nanjing University, People's Republic of China", u'full_name': u'Tao Jin'}] The Journal of Engineering, 2014

To alleviate the complex communication problems arising in the network-on-chip (NoC) architectures as the number of on-chip components increases, several novel interconnect infrastructures have been recently proposed to replace the traditional on-chip interconnection systems that are reaching their limits in terms of performance, power and area constraints. Wireless NoC (WiNoC) is among the most promising scalable interconnection architectures for future ...


FACARS: A novel fully adaptive congestion aware routing scheme for network on chip

[{u'author_order': 1, u'affiliation': u"Research Laboratory on Computer Sciences' Complex Systems, L'arbi Ben M'hidi University, Oum El Bouaghi, Algeria", u'full_name': u'Habib Chawki Touati'}, {u'author_order': 2, u'affiliation': u"Research Laboratory on Computer Sciences' Complex Systems, L'arbi Ben M'hidi University, Oum El Bouaghi, Algeria", u'full_name': u'Fateh Boutekkouk'}] 2018 7th Mediterranean Conference on Embedded Computing (MECO), None

Congestion awareness is deemed a key feature in the design of reliable routing algorithms for network on chip, because of its grave impact on performance. Nonetheless, such task is by no means trivial, as locally aware schemes have a narrow vision on network state, which could lead to poor decision-making, and globally aware routing requires complex computation units and introduces ...


Unified multi-objective mapping for network-on-chip using genetic-based hyper-heuristic algorithms

[{u'author_order': 1, u'affiliation': u"School of Microelectronics, Xidian University, People's Republic of China", u'full_name': u'Changqing Xu'}, {u'author_order': 2, u'affiliation': u"School of Microelectronics, Xidian University, People's Republic of China", u'full_name': u'Yi Liu'}, {u'author_order': 3, u'affiliation': u'Texas A&M University, College Station, USA', u'full_name': u'Peng Li'}, {u'author_order': 4, u'affiliation': u"School of Microelectronics, Xidian University, People's Republic of China", u'full_name': u'YinTang Yang'}] IET Computers & Digital Techniques, 2018

In this study, a flexible energy- and delay-aware mapping approach is proposed for the co-optimisation of energy consumption and communication latency for network-on-chips (NoCs). A novel genetic-based hyper-heuristic algorithm (GHA) is proposed as the core algorithm. This algorithm consists of bottom-level optimisation which includes a variety of operators and top-level optimisation which selects suitable operators through a `reward' mechanism. As ...


Towards the formal verification of security properties of a Network-on-Chip router

[{u'author_order': 1, u'affiliation': u'Technical University of Munich, Germany', u'full_name': u'Johanna Sepulveda'}, {u'author_order': 2, u'affiliation': u'Technical University of Munich, Germany', u'full_name': u'Damian Aboul-Hassan'}, {u'author_order': 3, u'affiliation': u'Technical University of Munich, Germany', u'full_name': u'Georg Sigl'}, {u'author_order': 4, u'affiliation': u'University of Freiburg, Germany', u'full_name': u'Bernd Becker'}, {u'author_order': 5, u'affiliation': u'University of Freiburg, Germany', u'full_name': u'Matthias Sauer'}] 2018 IEEE 23rd European Test Symposium (ETS), None

Vulnerabilities and design flaws in Network-on-Chip (NoC) routers can be exploited in order to spy, modify and constraint the sensitive communication inside the Multi-Processors Systems-on-Chip (MPSoCs). Although previous works address the NoC threat, finding secure and efficient solutions to verify the security is still a challenge. In this work, we propose for the first time a method to formally verify ...


Fuzzy & neural-based adaptive & deterministic routing algorithm for network-on-chip

[{u'author_order': 1, u'affiliation': u'Dept of Electronics and communication engineering, Chandigarh University, Gharuan, Chandigarh, India', u'full_name': u'Ashok Kumar Singh'}, {u'author_order': 2, u'affiliation': u'Dept of Electronics and communication engineering, Chandigarh University, Gharuan, Chandigarh, India', u'full_name': u'Ashima Shahi'}] 2018 2nd International Conference on Inventive Systems and Control (ICISC), None

Network-on-chip (NoC), a new packet based design method is an integrated solution to the challenging design in electronics, multimedia, and telecommunication domain. The method can be easily used in a conventional design flow. This paper is representing the architecture-level methodology for modelling and design of networks on chip using recent trends of technologies like fuzzy logic and neural network. Fuzzy ...


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IEEE-USA E-Books

  • The Chip Is the Network:Towards a Science of Network-on-Chip Design

    The Chip Is the Network: Towards a Science of Network-on-Chip Design reviews the major design methodologies that have had a profound effect on designing future Network-on-Chip (NoC) architectures. More precisely, it addresses the problem of NoC design in the deterministic context, where the application and the architecture are modeled as graphs with worst-case type of information about the parameters of the components influencing the network traffic. Rather than simply enumerating the proposed approaches, it takes a formal approach and also discusses the main features of each proposed solution. It then goes one step further by considering the design of NoCs with partial information available (primarily under the Markovian assumption) about the application and the architecture. Similarly to the deterministic context, it discusses various probabilistic approaches to NoC design and points out their advantages and limitations. Last, but not least, it looks at emerging approaches inspired rom statistical physics and information theory. The formal approach adopted means the network concept is addressed in the most general context, pointing out the main limitations of the proposed solutions, and suggesting a few open-ended problems. The Chip Is the Network: Towards a Science of Network-on-Chip Design is an invaluable reference for the NoC research community and, indeed anyone from CAD/VLSI academe or industry with an interest in this emerging paradigm.

  • A Reconfigurable On-Chip Interconnection Network for Large Multicore Systems

    This chapter introduces the baseline reconfigurable networks-on-chip (NoC) architecture. It addresses two problems of core to network mapping and topology exploration in which the cores of a given set of input applications are physically mapped to the network and then a suitable topology is found for each individual application. Experimental results, using some multicore system-on-chips (SoC) workloads, show that this architecture effectively improves the performance of NoCs by 29% and reduces the power consumption by 9% over one of the most efficient and popular mapping algorithms proposed for conventional NoCs. The chapter extends the baseline reconfigurable NoC to a generalized reconfigurable NoC architecture. This new cluster-based structure consists of several mesh clusters alongside a reconfigurable connection fabric that handles the intercluster communication. It can support both local and global traffic patterns in an efficient manner.

  • Time-Average-Frequency and Special Clocking Techniques: Gapped Clock, Stretchable Clock, and Pausible Clock

    Gapped clocking is a commonly used technique in optical transport networks (OTNs), broadcast video, and other applications. This chapter discusses the stretchable and pausible clock in connection with the application environment of a NoC (network-on-chip). The gapped clock is produced by removing pulses from a clock signal generated by an ?>untouchable?> clock source. The chapter also discusses the techniques, including the gapped clock, stretchable clock, pausible clock, and possible others all have the Time-Average-Frequency (TAF) concept work behind the scene. All these special clocking techniques illustrate the fact that the essence of clock frequency is the accomplishment of a specified number of operations within the time window of 1 s. An important topic related to the gapped clock, pausible clock, and stretched clock is clock jitter. It is crucial to understand that the pulse-length modification introduced by these special clocking techniques is an intended operation.

  • Application Platform

    This chapter contains sections titled: * SoC Design Paradigms * System Architecture * Low-power SoC Design * Network-on-Chip based SoC * References



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