Conferences related to Digital Circuits

Back to Top

2018 IEEE Symposium on VLSI Circuits

Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2020 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2016 IEEE Symposium on VLSI Circuits

    circuit design to address challenges of deeply scaled technologies - e.g. dfm, variability, reliability - digital circuit techniques - analog and mixed signal circuits such as data converters and amp

  • 2014 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2012 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation

  • 2011 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2010 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2009 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies

  • 2008 IEEE Symposium on VLSI Circuits

  • 2007 IEEE Symposium on VLSI Circuits


2018 IEEE Symposium on VLSI Technology

New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.

  • 2020 IEEE Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.

  • 2016 IEEE Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.

  • 2014 IEEE Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices.

  • 2012 IEEE Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices -

  • 2011 Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices -

  • 2010 IEEE Symposium on VLSI Technology

    New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D - system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices -

  • 2009 IEEE Symposium on VLSI Technology

    - New concepts and breakthroughs in VLSI processes and devices including Memory, Logic, I/O, and I/F (RF/Analog/MS, Imager, MEMS, etc.) - Advanced gate stack and interconnect in VLSI processes and devices - Advanced lithography and fine patternig technologies for high density VLSI - New functional devices beyond CMOS with a path for VLSI implantation - Packing of VLSI devices including 3D-system integration - Processes and devices modeling of VLSI devices - Reliability related to the above devices

  • 2008 IEEE Symposium on VLSI Technology

  • 2007 IEEE Symposium on VLSI Technology

  • 2006 IEEE Symposium on VLSI Technology


2017 IEEE International Solid- State Circuits Conference - (ISSCC)

The International Solid-State Circuits Conference is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS IC's.


2014 IEEE Custom Integrated Circuits Conference - CICC 2014

The IEEE Custom Integrated Circuits Conference (CICC) is the premier conference devoted to IC development. CICC showcases original, first-published innovative analog and digital circuit techniques covering a broad spectrum of technical topics. It is a forum for circuit, IC and SoC designers, CAD developers, manufacturers and ASIC users. CICC is the conference to find out how to solve design problems and improve circuit design and chip design techniques.


2014 IEEE International Symposium on Circuits and Systems (ISCAS)

The IEEE International Symposium on Circuits and Systems (ISCAS) is the flagship conference of the IEEE Circuits and Systems Society and the world’s premier networking forum in the highly active fields of theory, design and implementation of circuits and systems.ISCAS 2014 will have a special focus on nano/bio circuits and systems applied to enhancing living and lifestyles, and seeks to address multidisciplinary challenges in healthcare and well-being, the environment and climate change.

  • 2013 IEEE International Symposium on Circuits and Systems (ISCAS)

    The Symposium will focus on circuits and systems employing nanodevices (both extremely scaled CMOS and non-CMOS devices) and circuit fabrics (mixture of standard CMOS and evolving nano-structure elements) and their implementation cost, switching speed, energy efficiency, and reliability. The ISCAS 2010 will include oral and poster sessions; tutorials given by experts in state-of-the-art topics; and special sessions, with the aim of complementing the regular program with topics of particular interest to the community that cut across and beyond disciplines traditionally represented at ISCAS.

  • 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012

    2012 International Symposium on Circuits and Systems (ISCAS 2012) aims at providing the world's premier forum of leading researchers in circuits and systems areas from academia and industries, especially focusing on Convergence of BINET (BioInfoNanoEnviro Tech.) which represents IT, NT and ET and leading Human Life Revolutions. Prospective authors are invited to submit papers of their original works emphasizing contributions beyond the present state of the art. We also welcome proposals on special tuto

  • 2011 IEEE International Symposium on Circuits and Systems (ISCAS)

    The IEEE International Symposium on Circuits and Systems (ISCAS) is the world's premier networking forum of leading researchers in the highly active fields of theory, design and implementation of circuits and systems.

  • 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010

    ISCAS is a unique conference dealing with circuits and systems. It's the yearly "rendez-vous" of leading researchers, coming both from academia and industry, in the highly active fields of theory, design and implementation of circuits and systems. The Symposium will focus on circuits and systems for high quality life and consumer technologies, including mobile communications, advanced multimedia systems, sensor networks and Nano-Bio Circuit Fabrics and Systems.

  • 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009

    Analog Signal Processing, Biomedical Circuits and Systems, Blind Signal Processing, Cellular Neural Networks and Array Computing, Circuits and Systems for Communications, Computer-Aided Network Design, Digital Signal Processing, Life-Science Systems and Applications, Multimedia Systems and Applications, Nanoelectronics and Gigascale Systems, Neural Systems and Applications, Nonlinear Circuits and Applications, Power Systems and Power Electronic Circuits, Sensory Systems, Visual Signal Processing and Communi

  • 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008

  • 2007 IEEE International Symposium on Circuits and Systems - ISCAS 2007

  • 2006 IEEE International Symposium on Circuits and Systems - ISCAS 2006

  • 2005 IEEE International Symposium on Circuits and Systems - ISCAS 2005


More Conferences

Periodicals related to Digital Circuits

Back to Top

Circuits and Systems for Video Technology, IEEE Transactions on

Video A/D and D/A, display technology, image analysis and processing, video signal characterization and representation, video compression techniques and signal processing, multidimensional filters and transforms, analog video signal processing, neural networks for video applications, nonlinear video signal processing, video storage and retrieval, computer vision, packet video, high-speed real-time circuits, VLSI architecture and implementation for video technology, multiprocessor systems--hardware and software-- ...


Circuits and Systems I: Regular Papers, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems II: Express Briefs, IEEE Transactions on

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.


Circuits and Systems Magazine, IEEE


Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...


More Periodicals

Most published Xplore authors for Digital Circuits

Back to Top

Xplore Articles related to Digital Circuits

Back to Top

Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications

D. F. Anastasakis; N. Gopal; Seok-Yoon Kim; L. T. Pillage IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994

Asymptotic Waveform Evaluation (AWE) has been demonstrated as an efficient approach for interconnect circuit simulation/analysis. However, since it is based upon moment-matching, it is prone to yielding unstable approximations for stable circuits. This paper describes a systematic approach for alleviating the inherent instability associated with AWE and moment-matching methods as they apply to passive, digital, interconnect circuits. The efficiency and ...


An analytical approach for soft error rate estimation in digital circuits

G. Asadi; M. B. Tahoori 2005 IEEE International Symposium on Circuits and Systems, 2005

Soft errors due to cosmic rays cause reliability problems during lifetime operation of digital systems, which increase exponentially with Moore's law. The first step in developing efficient soft error tolerant schemes is to analyze the effect of soft errors at the system level. In this work, we develop a systematic approach for soft error rate estimation. Experiments on benchmark circuits ...


An improved analytical short-channel MOSFET model valid in all regions of operating for analog/digital circuit simulation

H. -C. Chow; W. -S. Feng; J. B. Kuo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992

An improved analytical model for short-channel MOSFETs which is valid in all regions of operation with both the continuous drain current and the output conductance by introducing a source-drain series resistance dependent scaling factor is proposed for analog/digital circuit simulation. This model considers all second-order effects for an accurate determination of the pinchoff point location without internal numerical iterations. Comparisons ...


Sequential circuit design using Quantum-dot Cellular Automata (QCA)

Lee Ai Lim; Azrul Ghazali; Sarah Chan Tji Yan; Chau Chien Fat 2012 IEEE International Conference on Circuits and Systems (ICCAS), 2012

As the size of CMOS transistors keep shrinking, it will eventually hit its limitation. Hence, an alternative device has to be discovered to continually improve the development of electronics devices. Quantum-dot cellular automata (QCA), is a potential device that can be used to implement digital circuits. In this paper, we present the basic theory of QCA cell and some fundamental ...


A modified charge-control model for HEMTs

M. A. Aziz; M. El-Banna Radio Science Conference, 1996. NRSC '96., Thirteenth National, 1996

A modified model for the charge control in HEMT devices is presented. The model is based on the solution of Poisson's equation in the AlGaAs layer using an accurate numerical method. The model assumes a non-uniform ionized donor concentration, this nonuniformity is assumed to follow the Fermi-Dirac statistics. The free carrier concentration in AlGaAs is deduced from the drift/diffusion equation ...


More Xplore Articles

Educational Resources on Digital Circuits

Back to Top

eLearning

Enhancing the stability of asymptotic waveform evaluation for digital interconnect circuit applications

D. F. Anastasakis; N. Gopal; Seok-Yoon Kim; L. T. Pillage IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1994

Asymptotic Waveform Evaluation (AWE) has been demonstrated as an efficient approach for interconnect circuit simulation/analysis. However, since it is based upon moment-matching, it is prone to yielding unstable approximations for stable circuits. This paper describes a systematic approach for alleviating the inherent instability associated with AWE and moment-matching methods as they apply to passive, digital, interconnect circuits. The efficiency and ...


An analytical approach for soft error rate estimation in digital circuits

G. Asadi; M. B. Tahoori 2005 IEEE International Symposium on Circuits and Systems, 2005

Soft errors due to cosmic rays cause reliability problems during lifetime operation of digital systems, which increase exponentially with Moore's law. The first step in developing efficient soft error tolerant schemes is to analyze the effect of soft errors at the system level. In this work, we develop a systematic approach for soft error rate estimation. Experiments on benchmark circuits ...


An improved analytical short-channel MOSFET model valid in all regions of operating for analog/digital circuit simulation

H. -C. Chow; W. -S. Feng; J. B. Kuo IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992

An improved analytical model for short-channel MOSFETs which is valid in all regions of operation with both the continuous drain current and the output conductance by introducing a source-drain series resistance dependent scaling factor is proposed for analog/digital circuit simulation. This model considers all second-order effects for an accurate determination of the pinchoff point location without internal numerical iterations. Comparisons ...


Sequential circuit design using Quantum-dot Cellular Automata (QCA)

Lee Ai Lim; Azrul Ghazali; Sarah Chan Tji Yan; Chau Chien Fat 2012 IEEE International Conference on Circuits and Systems (ICCAS), 2012

As the size of CMOS transistors keep shrinking, it will eventually hit its limitation. Hence, an alternative device has to be discovered to continually improve the development of electronics devices. Quantum-dot cellular automata (QCA), is a potential device that can be used to implement digital circuits. In this paper, we present the basic theory of QCA cell and some fundamental ...


A modified charge-control model for HEMTs

M. A. Aziz; M. El-Banna Radio Science Conference, 1996. NRSC '96., Thirteenth National, 1996

A modified model for the charge control in HEMT devices is presented. The model is based on the solution of Poisson's equation in the AlGaAs layer using an accurate numerical method. The model assumes a non-uniform ionized donor concentration, this nonuniformity is assumed to follow the Fermi-Dirac statistics. The free carrier concentration in AlGaAs is deduced from the drift/diffusion equation ...


More eLearning Resources

IEEE.tv Videos

Analog to Digital Types
The Josephson Effect: Josephson Digital Electronics in the Soviet Union
2017 IEEE Donald O. Pederson Award in Solid-State Circuits: Takao Nishitani and John S. Thompson
Interview with Takao Nishitani - IEEE Donald O. Pederson Award in Solid-State Circuits Co-Recipient 2017
Co-design of Power Amplifier and Dynamic Power Supplies for Radar and Communications Transmitters
ASC-2014 SQUIDs 50th Anniversary: 1 of 6 Arnold Silver
Analog to Digital Traits
Superconductive Energy-Efficient Computing - ASC-2014 Plenary-series - 6 of 13 - Wednesday 2014/8/13
IMS 2011-100 Years of Superconductivity (1911-2011) - Existing and Emerging RF Applications of Superconductivity
Analog Devices, Inc. accepts the IEEE Corporate Innovation Award - Honors Ceremony 2017
Low-energy High-performance Computing based on Superconducting Technology
IEEE Custom Integrated Circuits Conference
Voltage Metrology with Superconductive Electronics
Erasing Logic-Memory Boundaries in Superconductor Electronics - Vasili Semenov: 2016 International Conference on Rebooting Computing
R. Jacob Baker: CMOS & DRAM Circuit Design
Coherent Photonic Architectures: The Missing Link? - Hideo Mabuchi: 2016 International Conference on Rebooting Computing
Brooklyn 5G Summit: Going the Distance with CMOs: mm-Waves and Beyond
IEEE PELS Webinar Series-Galvanic Isolation for Power Supply Applications
ISSCC 2012 - Awards Ceremony
IMS 2011 Microapps - Memory Effects in RF Circuits: Definition, Manifestations and Fast, Accurate Simulation

IEEE-USA E-Books

  • SubstrateAware MixedSignal Macrocell Placement in WRIGHT

    We describe a set of placement algorithms for handling substrate-coupled switching noise. A typical mixed-signal IC has both sensitive analog and noisy digital circuits, and the common substrate parasitically couples digital switching transients into the sensitive analog regions of the chip. To preserve the integrity of sensitive analog signals, it is thus necessary to electrically isolate the analog and digital. We argue that optimal area utilization requires such isolation be designed into the system during first- cut chip-level placement. We present algorithms that incorporate commonly used isolation techniques within an automatic placement framework. Our substrate- noise evaluation mechanism uses a simplified substrate model and simple electrical representations for the noisy digital macrocells. The digital/analog interactions determined through these models are incorporated into a simulated annealing macrocell placement framework. Automatic placement results indicate these substrateaware algorithms allow efficient mixed-signal placement optimization.

  • Adaptive Power Supply Systems

    This chapter contains sections titled: A Voltage Reduction Technique for Battery Operated Systems Automatic Adjustment of Threshold and Supply Voltage for Minimum Power Consumption in CMOS Digital Circuits Low-Power Operation Using Self-Timed Circuits and Adaptive Scaling of the Supply Voltage A Low-Power Switching Power Supply for Self-Clocked Systems Variable-Voltage Digital-Signal Processing Scheduling for Reduced CPU Energy

  • Appendix A: Counting in Base 2

    This book explains, in lay terms, the surprisingly simple system of mathematical logic used in digital computer circuitry. Anecdotal in its style and often funny, it follows the development of this logic system from its origins in Victorian England to its rediscovery in this century as the foundation of all modern computing machinery. ONES AND ZEROS will be enjoyed by anyone who has a general interest in science and technology.

  • About the Author

    This book explains, in lay terms, the surprisingly simple system of mathematical logic used in digital computer circuitry. Anecdotal in its style and often funny, it follows the development of this logic system from its origins in Victorian England to its rediscovery in this century as the foundation of all modern computing machinery. ONES AND ZEROS will be enjoyed by anyone who has a general interest in science and technology.

  • No title

    In this book, PSpice for Filters and Transmission Lines, we examine a range of active and passive filters where each design is simulated using the latest Cadence Orcad V10.5 PSpice capture software. These filters cannot match the very high order digital signal processing (DSP) filters considered in PSpice for Digital Signal Processing, but nevertheless these filters have many uses. The active filters considered were designed using Butterworth and Chebychev approximation loss functions rather than using the 'cookbook approach' so that the final design will meet a given specification in an exacting manner. Switched-capacitor filter circuits are examined and here we see how useful PSpice/Probe is in demonstrating how these filters, filter, as it were. Two- port networks are discussed as an introduction to transmission lines and, using a series of problems, we demonstrate quarter-wave and single-stub matching. The concept of time domain reflectrometry as a fault location tool on transmission lines is then examined. In the last chapter we discuss the technique of importing and exporting speech signals into a PSpice schematic using a tailored-made program Wav2ascii. This is a novel technique that greatly extends the simulation boundaries of PSpice. Various digital circuits are also examined at the end of this chapter to demonstrate the use of the bus structure and other techniques.

  • Wavelets in Packaging, Interconnects, and EMC

    In this chapter we study multiconductor, multilayered transmission lines (MMTL) employing quasi-static, quasi-dynamic, and full-wave analyses. We begin with the quasi-static formulation (QSF), which provides the parasitic capacitance, inductance, resistance, and conductance. We introduce an intermediate formulation between that of the quasi-static and full-wave, referred to as the quasi-dynamic formulation (QDF). Next, we present the full- wave analysis, from which we extract the scattering parameters. The emphasis of this chapter is given to packaging and interconnects of high-speed digital circuits and systems and the implementation of numerical algorithms using wavelets.

  • Combinational Logic

    This chapter contains sections titled: AND and NOT Grouping with Parentheses AND and OR with More Than Two Inputs Algebraic Examples of Arbitrary-Input AND and OR Functions Truth Tables for Arbitrary-Input AND and OR Functions Creating Arbitrary-Input AND and OR Gates from the Old Two-Input Kind An Arbitrary-Input AND Gate An Arbitrary-Input OR Gate

  • Index

    "Leading experts in the field present this collection of original contributions as a practical approach to low-power analog and digital circuit theory and design, illustrated with important applications and examples. LOW- VOLTAGE/LOW-POWER INTEGRATED CIRCUITS AND SYSTEMS features comprehensive coverage of the latest techniques for the design, modeling, and characterization of low-power analog and digital circuits. LOW-VOLTAGE/LOW- POWER INTEGRATED CIRCUITS AND SYSTEMS will help you improve your understanding of the trade-offs between analog and digital circuits and systems. It is an invaluable resource for enhancing your designs. This book is intended for senior and graduate students. It is also intended as a key reference for designers in the semiconductor and communication industries. Highlighted applications include: * Low-voltage analog filters * Low-power multiplierless YUV to RGB based on human vision perception * Micropower systems for implantable defibrillators and pacemakers * Neuromorphic systems * Low-power design in telecom circuits"

  • Combinational Circuits

    This chapter contains sections titled: Introduction to Digital Circuits Binary Numbers: a Quick Introduction Boolean Algebra Minterms: Standard or Canonical Sum of Products (SOP) Form Maxterms: Standard or Canonical Product of Sums (POS) Form Karnaugh Maps and Design Examples Product of Sums Simplifications Don't Care Conditions Logic Gates: Electrical and Timing Characteristics Summary Further Reading Problems

  • Multilevel and MixedDomain Simulation of Analog Circuits and Systems

    Integrated circuit design has evolved to the stage where large, complex, analog and digital functionalities are implemented on a single chip or as an integrated chip set. Besides the mixed signal nature of the designs, the analog sections also include continuous-time and discrete-time components. Thus, for analysis of these integrated modules, all encompassing simulation capabilities are required that address, not only transient analysis of mixed analog-digital circuits, but frequency domain analysis as well. In this paper, we present mechanisms for multilevel and mixed-domain simulation of analog systems tied in with mixed analog-digital simulation. We then describe the implementation in the form of an open-ended and expandable simulation framework, iMACSIM. A simulation backplane is used to provide a general event- processing and scheduling framework that ties together the various algorithms necessary for simulation of various classes of circuits in different analysis regimes.



Standards related to Digital Circuits

Back to Top

No standards are currently tagged "Digital Circuits"


Jobs related to Digital Circuits

Back to Top