Conferences related to Moore's Law

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2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems

The conference is a forum for researchers and designers to present and discuss various aspects of VLSI design, electronic design automation (EDA), embedded systems, and enabling technologies. It covers the entire spectrum of activities in the two vital areas of very large scale integration (VLSI) and embedded systems, which underpin the semiconductor industry.


2013 IEEE 10th International Conference on ASIC (ASICON 2013)

I. Design Techniques[1] VLSI Design and Circuits[2] Analog, Mixed Signal and RF Circuits[3] Application-Specific SoCs[4] Circuits and Systems for Wireless Communications [5] Testing, Reliability, Fault-Tolerance[6] Advanced MemoryII. CAD Techniques[7] Circuits Simulation, Synthesis, Verification and Physical design[8] CAD for system, Design for Manufacturing and TestingIII. New Techniques, new processing, new devices and their applications[9] MEMS Techniques[10] Nanoelectronics and Gigascale systems[11] New Devices: Hetrojunction Devices, Fin FET, CNT MTJ Devices,, 3-D integration, etc..[12] Advanced Interconnection Technology, High K/Metal gate technology and other VLSL New Processing, New technologies .[13] VLSI application for Energy generation, conservation and control,IC Design, Analog Circuit, Mixed Signal & RF Circuits, SOC, Wireless Communication, IC Testing, Reliebility, CAD Techniques, Synthesis, Verification, Physical Design, DMF, Memory, MEMS, 3D IC, High K/

  • 2011 IEEE 9th International Conference on ASIC (ASICON 2011)

    Design Techniques;VLSI Design and Circuits;Analog, Mixed Signal and RF Circuits;Application-Specific SoCs;Circuits and Systems for Wireless Communications;Testing, Reliability, Fault-Tolerance;Advanced Memory;CAD Techniques;Circuits Simulation, Synthesis, Verification and Physical design;CAD for system, Design for Manufacturing and Testing;Emerging Applications and New Technologies;MEMS Techniques;Nanoelectronics and Gigascale systems; New Devices Hetro-integration, 3-D integration;VLSL New Processing, New

  • 2009 IEEE 8th International Conference on ASIC (ASICON 2009)

    Analog Integrated Circuits Design, Digital Integrated Circuits Design, RF IC Design, Digital Signal Processing, Mixed-Signal IC , Applcation-Specific SOCs, Low Power IC, FPGA, Embedded Processors, Circuits for Wireless Communications, Flash Memory, Ferroelectric Memory, Resistive Switching Memory, Phase Change Memory, Design for testing, Design for Manufacturing, CMOS reliebility, CAD tools, MEMS, NEMS

  • 2007 7th International Conference on ASIC (ASICON 2007)


2011 Symposium on VLSI Circuits

Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow


2008 Design, Automation & Test in Europe Conference & Exhibition (DATE 2008)

The 11th DATE conference and exhibition is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. It puts strong emphasis on ICs/SoCs, reconfigurable hardware and embedded systems, including embedded software. The five-day event consists of a conference with plenary invited papers, regular papers, panels, hot-topic sessions, tutorials.



Periodicals related to Moore's Law

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Communications Magazine, IEEE

IEEE Communications Magazine was the number three most-cited journal in telecommunications and the number eighteen cited journal in electrical and electronics engineering in 2004, according to the annual Journal Citation Report (2004 edition) published by the Institute for Scientific Information. Read more at http://www.ieee.org/products/citations.html. This magazine covers all areas of communications such as lightwave telecommunications, high-speed data communications, personal communications ...


Computer

Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed technical content that covers all aspects of computer science, computer engineering, technology, and applications. Computer is a resource that practitioners, researchers, and managers can rely on to provide timely information about current research developments, trends, best practices, and changes in the profession.


Fuzzy Systems, IEEE Transactions on

Theory and application of fuzzy systems with emphasis on engineering systems and scientific applications. (6) (IEEE Guide for Authors) Representative applications areas include:fuzzy estimation, prediction and control; approximate reasoning; intelligent systems design; machine learning; image processing and machine vision;pattern recognition, fuzzy neurocomputing; electronic and photonic implementation; medical computing applications; robotics and motion control; constraint propagation and optimization; civil, chemical and ...


Proceedings of the IEEE

The most highly-cited general interest journal in electrical engineering and computer science, the Proceedings is the best way to stay informed on an exemplary range of topics. This journal also holds the distinction of having the longest useful archival life of any EE or computer related journal in the world! Since 1913, the Proceedings of the IEEE has been the ...


Semiconductor Manufacturing, IEEE Transactions on

Addresses innovations of interest to the integrated circuit manufacturing researcher and professional. Includes advanced process control, equipment modeling and control, yield analysis and optimization, defect control, and manufacturability improvement. It also addresses factory modelling and simulation, production planning and scheduling, as well as environmental issues in semiconductor manufacturing.


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Xplore Articles related to Moore's Law

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Analysis of short channel effects for 14nm and beyond Si-bulk FinFET

Xiaolei Yang; Yong Li; Xinyun Xie; Shuai Zhang; Zhaoxu Shen; Fei Zhou; Xin He; Jie Zhao; Gang Mao; Anni Wang; Jianhua Ju 2016 China Semiconductor Technology International Conference (CSTIC), 2016

As Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuit (IC) technology scales down to 14nm and sub-14nm node according to Moore's Law, Si- bulk FinFET has been demonstrated as one of the most promising device architectures due to higher transistor performance, larger density and lower leakage. However, as the gate length scales down continuously, short channel effect, mainly Vth roll-up/off, becomes ...


Errata for "The Multiple Lives of Moore's Law," Vol. 52, no. 4 (NA), April 2015, p. 30

IEEE Spectrum, 2015

The number of components quoted in the sentence "By 1965, the company was getting ready to release a chip with 64 components" is a ballpark figure based on Moore's chart showing the growth in the number of components over time. Moore has given approximate figures for the number of components on the chips that Fairchild was working on around 1965.


Special Session 9B: Embedded Tutorial: Nanoelectronics - What Next? From Moore's Law to Feynman's Vision

26th IEEE VLSI Test Symposium (vts 2008), 2008

Provides an abstract of the keynote presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings.


Wireless beyond the third generation-facing the energy challenge

J. M. Rabaey Low Power Electronics and Design, International Symposium on, 2001., 2001

After a stellar growth over the last decade driven by voice as the killer app, wireless communications is now rapidly moving into a new era propelled by data networking. For a wide host of devices, wireless will serve as the "last interconnection hop" to the high data-rate wired networks. The basic trends in these devices can be best summarized under ...


Software design for decoupled parallel meshing of CAD models

Serban Georgescu; Peter Chow 2013 5th International Workshop on Software Engineering for Computational Science and Engineering (SE-CSE), 2013

The creation of Finite Element (FE) meshes is one of the most time-consuming steps in FE analysis. While the exponential increase in computational power, following Moore's law, has gradually reduced the time spent in the FE solver, this has not generally been the case for FE mesh creation software. There are two main reason why this has been the case: ...


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Educational Resources on Moore's Law

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eLearning

Analysis of short channel effects for 14nm and beyond Si-bulk FinFET

Xiaolei Yang; Yong Li; Xinyun Xie; Shuai Zhang; Zhaoxu Shen; Fei Zhou; Xin He; Jie Zhao; Gang Mao; Anni Wang; Jianhua Ju 2016 China Semiconductor Technology International Conference (CSTIC), 2016

As Complementary Metal Oxide Semiconductor (CMOS) Integrated Circuit (IC) technology scales down to 14nm and sub-14nm node according to Moore's Law, Si- bulk FinFET has been demonstrated as one of the most promising device architectures due to higher transistor performance, larger density and lower leakage. However, as the gate length scales down continuously, short channel effect, mainly Vth roll-up/off, becomes ...


Errata for "The Multiple Lives of Moore's Law," Vol. 52, no. 4 (NA), April 2015, p. 30

IEEE Spectrum, 2015

The number of components quoted in the sentence "By 1965, the company was getting ready to release a chip with 64 components" is a ballpark figure based on Moore's chart showing the growth in the number of components over time. Moore has given approximate figures for the number of components on the chips that Fairchild was working on around 1965.


Special Session 9B: Embedded Tutorial: Nanoelectronics - What Next? From Moore's Law to Feynman's Vision

26th IEEE VLSI Test Symposium (vts 2008), 2008

Provides an abstract of the keynote presentation and a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings.


Wireless beyond the third generation-facing the energy challenge

J. M. Rabaey Low Power Electronics and Design, International Symposium on, 2001., 2001

After a stellar growth over the last decade driven by voice as the killer app, wireless communications is now rapidly moving into a new era propelled by data networking. For a wide host of devices, wireless will serve as the "last interconnection hop" to the high data-rate wired networks. The basic trends in these devices can be best summarized under ...


Software design for decoupled parallel meshing of CAD models

Serban Georgescu; Peter Chow 2013 5th International Workshop on Software Engineering for Computational Science and Engineering (SE-CSE), 2013

The creation of Finite Element (FE) meshes is one of the most time-consuming steps in FE analysis. While the exponential increase in computational power, following Moore's law, has gradually reduced the time spent in the FE solver, this has not generally been the case for FE mesh creation software. There are two main reason why this has been the case: ...


More eLearning Resources

IEEE.tv Videos

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IEEE-USA E-Books

  • No title

    Integrated circuit capacity follows Moore's law, and chips are commonly produced at the time of this writing with over 70 million gates per device. Ensuring correct functional behavior of such large designs before fabrication poses an extremely challenging problem. Formal verification validates the correctness of the implementation of a design with respect to its specification through mathematical proof techniques. Formal techniques have been emerging as commercialized EDA tools in the past decade. Simulation remains a predominantly used tool to validate a design in industry. After more than 50 years of development, simulation methods have reached a degree of maturity, however, new advances continue to be developed in the area. A simulation approach for functional verification can theoretically validate all possible behaviors of a design but requires excessive computational resources. Rapidly evolving markets demand short design cycles while the increasing complexity of a design caus s simulation approaches to provide less and less coverage. Formal verification is an attractive alternative since 100% coverage can be achieved; however, large designs impose unrealistic computational requirements. Combining formal verification and simulation into a single integrated circuit validation framework is an attractive alternative. This book focuses on an Integrated Design Validation (IDV) system that provides a framework for design validation and takes advantage of current technology in the areas of simulation and formal verification resulting in a practical validation engine with reasonable runtime. After surveying the basic principles of formal verification and simulation, this book describes the IDV approach to integrated circuit functional validation. Table of Contents: Introduction / Formal Methods Background / Simulation Approaches / Integrated Design Validation System / Conclusion and Summary

  • No title

    In order to sustain Moore's Law-based device scaling, principal attention has focused on toward device architectural innovations for improved device performance as per ITRS projections for technology nodes up to 10 nm. Efficient integration of lower substrate temperatures (<300K) to these innovatively configured device structures can enable the industry professionals to keep up with Moore's Law-based scaling curve conforming with ITRS projection of device performance outcome values. In this prospective review E-book, the authors have systematically reviewed the research results based on scaled device architectures, identified key bottlenecks to sustained scaling-based performance, and through original device simulation outcomes of conventional long channel MOSFET extracted the variation profile of threshold voltage as a function of substrate temperature which will be instrumental in reducing subthreshold leakage current in the temperature range 100K-300K. An exploitation methodo ogy to regulate the die temperature to enable the efficient performance of a high-density VLSI circuit is also documented in order to make the lower substrate temperature operation of VLSI circuits and systems on chip process compatible.

  • No title

    As Moore's Law and Dennard scaling trends have slowed, the challenges of building high-performance computer architectures while maintaining acceptable power efficiency levels have heightened. Over the past ten years, architecture techniques for power efficiency have shifted from primarily focusing on module-level efficiencies, toward more holistic design styles based on parallelism and heterogeneity. This work highlights and synthesizes recent techniques and trends in power-efficient computer architecture. Table of Contents: Introduction / Voltage and Frequency Management / Heterogeneity and Specialization / Communication and Memory Systems / Conclusions / Bibliography / Authors' Biographies

  • No title

    In 1965, Intel co-founder Gordon Moore, in "Cramming more components onto Integrated Circuits" in Electronics Magazine (April 19, 1965), made the observation that, in the history of computing hardware, the number of transistors on integrated circuits doubles approximately every two years. Since its inception in 1965 until recent times, this law has been used in the semiconductor industry to guide investments for long-term planning as well as to set targets for research and development. These investments have helped in a productive utilization of wealth, which created more employment opportunities for semiconductor industry professionals. In this way, the development of Moore's Law has helped sustain the progress of today's knowledge-based economy. While Moore's Law has, on one hand, helped drive investments toward technological and economic growth, thereby benefiting the consumers with more powerful electronic gadgets, Moore's Law has indirectly also helped to fuel other innovatio s in the global economy. However, the Law of diminishing returns is now questioning the sustainability of further evolution of Moore's Law and its ability to sustain the progress of today's knowledge based economy. The lack of liquidity in the global economy is truly bringing the entire industry to a standstill and the dark clouds of an economic depression are hovering over the global economy. What factors have been ignored by the global semiconductor industry leading to a demise of Moore's Law? Do the existing business models prevalent in the semiconductor industry pose any problems? Have supply chains made that progress unsustainable? In today's globalized world, have businesses been able to sustain national interests while driving the progress of Moore's Law? Could the semiconductor industry help the entire global economy move toward a radiance of the new crimson dawn, beyond the veil of the darkest night by sustaining the progress of Moore's Law? The entire semiconductor ind stry is now clamoring for a fresh approach to overcome existing barriers to the progress of Moore's Law, and this book delivers just that. Moore's Law can easily continue for the foreseeable future if the chip manufacturing industry becomes sustainable by having a balanced economy. The sustainable progress of Moore's Law advocates the "heresy" of transforming the current economic orthodoxy of monopoly capitalism into free-market capitalism. The next big thing that everybody is looking forward to after mobile revolution is the "Internet of Things" (IoT) revolution. While some analysts forecast that the IoT market would achieve 5.4 billion connections worldwide by 2020, the poor consumer purchasing power in global economy makes this forecast truly questionable. Sustaining Moore's Law presents a blueprint for sustaining the progress of Moore's Law to bring about IoT Revolution in the global economy.

  • No title

    For many years, most computer architects have pursued one primary goal: performance. Architects have translated the ever-increasing abundance of ever- faster transistors provided by Moore's law into remarkable increases in performance. Recently, however, the bounty provided by Moore's law has been accompanied by several challenges that have arisen as devices have become smaller, including a decrease in dependability due to physical faults. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. The two main purposes of this book are to explore the key ideas in fault-tolerant computer architecture and to present the current state-of-the-art - over approximately the past 10 years - in academia and industry. Table of Contents: Introduction / Error Detection / Error Recovery / Diagnosis / Self-Repair / The Future

  • Index

    Computing is usually viewed as a technology field that advances at the breakneck speed of Moore's Law. If we turn away even for a moment, we might miss a game-changing technological breakthrough or an earthshaking theoretical development. This book takes a different perspective, presenting computing as a science governed by fundamental principles that span all technologies. Computer science is a science of information processes. We need a new language to describe the science, and in this book Peter Denning and Craig Martell offer the great principles framework as just such a language. This is a book about the whole of computing -- its algorithms, architectures, and designs. Denning and Martell divide the great principles of computing into six categories: communication, computation, coordination, recollection, evaluation, and design. They begin with an introduction to computing, its history, its many interactions with other fields, its domains of practice, and the structure o the great principles framework. They go on to examine the great principles in different areas: information, machines, programming, computation, memory, parallelism, queueing, and design. Finally, they apply the great principles to networking, the Internet in particular. _Great Principles of Computing_ will be essential reading for professionals in science and engineering fields with a "computational" branch, for practitioners in computing who want overviews of less familiar areas of computer science, and for non-computer science majors who want an accessible entry way to the field.

  • References

    Computing is usually viewed as a technology field that advances at the breakneck speed of Moore's Law. If we turn away even for a moment, we might miss a game-changing technological breakthrough or an earthshaking theoretical development. This book takes a different perspective, presenting computing as a science governed by fundamental principles that span all technologies. Computer science is a science of information processes. We need a new language to describe the science, and in this book Peter Denning and Craig Martell offer the great principles framework as just such a language. This is a book about the whole of computing -- its algorithms, architectures, and designs. Denning and Martell divide the great principles of computing into six categories: communication, computation, coordination, recollection, evaluation, and design. They begin with an introduction to computing, its history, its many interactions with other fields, its domains of practice, and the structure o the great principles framework. They go on to examine the great principles in different areas: information, machines, programming, computation, memory, parallelism, queueing, and design. Finally, they apply the great principles to networking, the Internet in particular. _Great Principles of Computing_ will be essential reading for professionals in science and engineering fields with a "computational" branch, for practitioners in computing who want overviews of less familiar areas of computer science, and for non-computer science majors who want an accessible entry way to the field.



Standards related to Moore's Law

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Jobs related to Moore's Law

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