Microprocessor

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A microprocessor incorporates the functions of a computer's central processing unit (CPU) on a single integrated circuit (IC, or microchip). It is a multipurpose, programmable, clock-driven, register-based electronic device that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. (Wikipedia.org)






Conferences related to Microprocessor

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2018 IEEE Symposium on VLSI Circuits

Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2020 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2016 IEEE Symposium on VLSI Circuits

    circuit design to address challenges of deeply scaled technologies - e.g. dfm, variability, reliability - digital circuit techniques - analog and mixed signal circuits such as data converters and amp

  • 2014 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2012 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation

  • 2011 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2010 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2009 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies

  • 2008 IEEE Symposium on VLSI Circuits

  • 2007 IEEE Symposium on VLSI Circuits


2017 IEEE International Solid- State Circuits Conference - (ISSCC)

The International Solid-State Circuits Conference is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS IC's.


2014 IEEE Custom Integrated Circuits Conference - CICC 2014

The IEEE Custom Integrated Circuits Conference (CICC) is the premier conference devoted to IC development. CICC showcases original, first-published innovative analog and digital circuit techniques covering a broad spectrum of technical topics. It is a forum for circuit, IC and SoC designers, CAD developers, manufacturers and ASIC users. CICC is the conference to find out how to solve design problems and improve circuit design and chip design techniques.


ESSCIRC 2013 - 39th European Solid State Circuits Conference

The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits and technologies. The conference is jointly organized with ESSDERC, which covers advances in process technology and devices.

  • ESSCIRC 2012 - 38th European Solid State Circuits Conference

    The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits.

  • ESSCIRC 2011 - 37th European Solid State Circuits Conference

    he aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits. ESSCIRC and its sister conference ESSDERC, which deals with solid-state devices and technologies, are jointly organized.

  • ESSCIRC 2010 - 36th European Solid State Circuits Conference

    The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits.

  • ESSCIRC 2009 - 35th European Solid State Circuits Conference

    The aim of the ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. The aim of the ESSCIRC is to provide corresponding forum in the field of silicon design and implementation.


2012 16th IEEE International Symposium on Power Line Communications and Its Applications (ISPLC)

ISPLC 2012 will bring together academia and industry professionals as well as students and researchers to present and discuss ongoing work on existing and future power line communication (PLC) systems, PLC applications, PLC standardization activities. The contributions presented at ISPLC will span all aspects of communications over power lines, including access, home networking, in-vehicle applications, utility applications, smart grids, and more.


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Periodicals related to Microprocessor

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Computer Architecture Letters

Rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessors computer systems, computer architecture workload characterization, performance evaluation and simulation techniques, and power-aware computing


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.


Micro, IEEE

IEEE Micro magazine presents high-quality technical articles from designers, systems integrators, and users discussing the design, performance, or application of microcomputer and microprocessor systems. Topics include architecture, components, subassemblies, operating systems, application software, communications, fault tolerance, instrumentation, control equipment, and peripherals.


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Most published Xplore authors for Microprocessor

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Xplore Articles related to Microprocessor

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Fast memory addressing scheme for radix-4 FFT implementation

Xin Xiao; Erdal Oruklu; Jafar Saniie 2009 IEEE International Conference on Electro/Information Technology, 2009

In this study, an efficient addressing scheme for radix-4 FFT processor is presented. The proposed method uses extra registers to buffer and reorder the data inputs of the butterfly unit. It avoids the modulo-r addition in the address generation; hence, the critical path is significantly shorter than the conventional radix-4 FFT implementations. A significant property of the proposed method is ...


Low power analog circuit techniques in the 5<sup>th</sup> generation intel core<sup>TM</sup> microprocessor (broadwell)

Praveen Mosalikanti; Nasser Kurd; Chris Mozak; Takao Oshita 2015 IEEE Custom Integrated Circuits Conference (CICC), 2015

Fabricated on a 14nm process technology node, the Intel CoreTM M and the 5th generation CoreTM processors (code named Broadwell) improve energy efficiency over the previous 22nm generation by up to 2.5x. Numerous optimizations were used in the analog circuits to achieve this power reduction. PLLs were designed to have low analog Vmin to enable operation without the use of ...


An engineering approach to transient response sensitivity

D. R. Towill Radio and Electronic Engineer, 1984

The historical development of techniques for prediction of transient response sensitivity of SISO feedback control systems to plant changes is reviewed starting with the analogue approach of Tomovic and leading up to the current state of the art. It is shown that for a given transient response performance specification, significant and quantifiable improvement in sensitivity reduction can be achieved in ...


Theory and application of parameter self-optimizing intelligent sampling method

Pan Wencheng IEEE 10th INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, 2010

Parameter self-optimizing sampling is a method of software synchronization. This paper further investigates correcting parameter self-optimizing on the basis of sampling parameter self-optimizing, analyzes its application in harmonic measuring. Using mountain-climb searching and the algorithms of traversal frequency points, it finds the sampling number N, the alternation Ts. The optimizing sampling parameters make it over 67% within power periods that ...


The microprocessor based modified space vector control of the matrix converter

E. M. Chekhet; V. P. Mordatch Proceedings of IEEE International Symposium on Industrial Electronics, 1996

In recent years, PWM matrix power converters have been studied for eliminating the DC links of conventional power converter and inverter systems. A new method, based on space vector modulation, has been proposed which is more effective than the traditional PWM. In this paper, the development of this method is investigated. The forming of the required averaged space voltage vector ...


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Educational Resources on Microprocessor

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eLearning

Fast memory addressing scheme for radix-4 FFT implementation

Xin Xiao; Erdal Oruklu; Jafar Saniie 2009 IEEE International Conference on Electro/Information Technology, 2009

In this study, an efficient addressing scheme for radix-4 FFT processor is presented. The proposed method uses extra registers to buffer and reorder the data inputs of the butterfly unit. It avoids the modulo-r addition in the address generation; hence, the critical path is significantly shorter than the conventional radix-4 FFT implementations. A significant property of the proposed method is ...


Low power analog circuit techniques in the 5<sup>th</sup> generation intel core<sup>TM</sup> microprocessor (broadwell)

Praveen Mosalikanti; Nasser Kurd; Chris Mozak; Takao Oshita 2015 IEEE Custom Integrated Circuits Conference (CICC), 2015

Fabricated on a 14nm process technology node, the Intel CoreTM M and the 5th generation CoreTM processors (code named Broadwell) improve energy efficiency over the previous 22nm generation by up to 2.5x. Numerous optimizations were used in the analog circuits to achieve this power reduction. PLLs were designed to have low analog Vmin to enable operation without the use of ...


An engineering approach to transient response sensitivity

D. R. Towill Radio and Electronic Engineer, 1984

The historical development of techniques for prediction of transient response sensitivity of SISO feedback control systems to plant changes is reviewed starting with the analogue approach of Tomovic and leading up to the current state of the art. It is shown that for a given transient response performance specification, significant and quantifiable improvement in sensitivity reduction can be achieved in ...


Theory and application of parameter self-optimizing intelligent sampling method

Pan Wencheng IEEE 10th INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING PROCEEDINGS, 2010

Parameter self-optimizing sampling is a method of software synchronization. This paper further investigates correcting parameter self-optimizing on the basis of sampling parameter self-optimizing, analyzes its application in harmonic measuring. Using mountain-climb searching and the algorithms of traversal frequency points, it finds the sampling number N, the alternation Ts. The optimizing sampling parameters make it over 67% within power periods that ...


The microprocessor based modified space vector control of the matrix converter

E. M. Chekhet; V. P. Mordatch Proceedings of IEEE International Symposium on Industrial Electronics, 1996

In recent years, PWM matrix power converters have been studied for eliminating the DC links of conventional power converter and inverter systems. A new method, based on space vector modulation, has been proposed which is more effective than the traditional PWM. In this paper, the development of this method is investigated. The forming of the required averaged space voltage vector ...


More eLearning Resources

IEEE-USA E-Books

  • Technology Issues

    This book covers the design of next generation microprocessors in deep submicron CMOS technologies. The chapters in Design of High Performance Microprocessor Circuits were written by some of the world's leading technologists, designers, and researchers. All levels of system abstraction are covered, but the emphasis rests squarely on circuit design. Examples are drawn from processors designed at AMD, Digital/Compaq, IBM, Intel, MIPS, Mitsubishi, and Motorola. Each topic of this invaluable reference stands alone so the chapters can be read in any order. The following topics are covered in depth: Architectural constraints of CMOS VLSI design Technology scaling, low-power devices, SOI, and process variations Contemporary design styles including a survey of logic families, robust dynamic circuits, asynchronous logic, self-timed pipelines, and fast arithmetic units Latches, clocks and clock distribution, phase-locked and delay-locked loops Register file, cache memory, and embedded DRAM design High-speed signaling techniques and I/O design ESD, electromigration, and hot-carrier reliability CAD tools, including timing verification and the analysis of power distribution schemes Test and testability Design of High-Performance Microprocessor Circuits assumes a basic knowledge of digital circuit design and device operation, and covers a broad range of circuit styles and VLSI design techniques. Packed with practical know-how, it is an indispensable reference for practicing circuit designers, architects, system designers, CAD tool developers, process technologists, and researchers. It is also an essential text for VLSI design courses.

  • Reliability

    This book covers the design of next generation microprocessors in deep submicron CMOS technologies. The chapters in Design of High Performance Microprocessor Circuits were written by some of the world's leading technologists, designers, and researchers. All levels of system abstraction are covered, but the emphasis rests squarely on circuit design. Examples are drawn from processors designed at AMD, Digital/Compaq, IBM, Intel, MIPS, Mitsubishi, and Motorola. Each topic of this invaluable reference stands alone so the chapters can be read in any order. The following topics are covered in depth: Architectural constraints of CMOS VLSI design Technology scaling, low-power devices, SOI, and process variations Contemporary design styles including a survey of logic families, robust dynamic circuits, asynchronous logic, self-timed pipelines, and fast arithmetic units Latches, clocks and clock distribution, phase-locked and delay-locked loops Register file, cache memory, and embedded DRAM design High-speed signaling techniques and I/O design ESD, electromigration, and hot-carrier reliability CAD tools, including timing verification and the analysis of power distribution schemes Test and testability Design of High-Performance Microprocessor Circuits assumes a basic knowledge of digital circuit design and device operation, and covers a broad range of circuit styles and VLSI design techniques. Packed with practical know-how, it is an indispensable reference for practicing circuit designers, architects, system designers, CAD tool developers, process technologists, and researchers. It is also an essential text for VLSI design courses.

  • CMOS Scaling and Issues in Sub0.25 m Systems

    This chapter contains sections titled: MOSFET Scaling Theory CMOS Scaling Issues below 0.25 ?>m Interconnect RC Delay Low-Temperature CMOS This chapter contains sections titled: References

  • Timing Verification

    This chapter contains sections titled: Introduction Timing Verification Goals and Analysis Key Factors in High-Speed Design and Timing Verification Timing Verification of Nonmemory Custom Blocks Timing Verification of Memory Blocks Design Flow and Full-Chip Timing Verification Future Challenges This chapter contains sections titled: References

  • Electromigration Reliability

    This chapter contains sections titled: Introduction Materials and Process Effects on Electromigration Electromigration Lifetime Designing for Electromigration Reliability Conclusion This chapter contains sections titled: Acknowledgments References

  • Techniques for Leakage Power Reduction

    This chapter contains sections titled: Introduction Transistor Leakage Current Components Circuit Subthreshold Leakage Current Leakage Control Techniques This chapter contains sections titled: Acknowledgments References

  • Design and Analvsis of Power Distribution Networks

    This chapter contains sections titled: Introduction Power Distribution Design Power Distribution Analysis Power Grid Models Conclusion This chapter contains sections titled: References

  • Design and Analysis of Power Dlstrlbutlon Networks in PowerPC Microprocessors

    We present a methodology for the design and analysis of power grids in the PowerPCTM microprocessors. The methodology covers the need for power grid analysis across all stages of the design process. A case study showing the application of this methodology to the PowerPCTM 750 microprocessor is presented.

  • Techniques for Driving Interconnect

    This chapter contains sections titled: Introduction Technology Scaling Trends Problems and Solutions Regarding Capacitance Problems and Solutions Regarding Inductance Problems and Solutions Regarding Resistance Problems and Solutions Regarding Long Distance Routing Conclusion This chapter contains sections titled: Acknowledgments References

  • Hot Carrier Reliability

    This chapter contains sections titled: What Are Hot Carriers? How Do Hot Carriers Degrade MOSFETS? Modeling the Degradation Circuit Effects Ensuring Circuit Reliability Example Analysis Transistor Scaling Trends This chapter contains sections titled: References



Standards related to Microprocessor

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IEEE Recommended Practice for Microprocessor-Based Protection Equipment Firmware Control

The scope of this recommended practice is to identify the means for timely and efficient exchange of information between manufacturers and users of protection-related equipment with respect to (1) changes in device firmware and (2) the impact of those changes. It will also include an examination of the technical and operational ramifications resulting from changes in the device firmware. Only ...


IEEE Standard for a 32-bit Microprocessor Architecture


IEEE Standard for a Versatile Backplane Bus: VMEbus


IEEE Standard for an 8-Bit Microcomputer Bus System: STD Bus


IEEE Standard for Mechanical Core Specifications for Microprocessors



Jobs related to Microprocessor

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