Microprocessor

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A microprocessor incorporates the functions of a computer's central processing unit (CPU) on a single integrated circuit (IC, or microchip). It is a multipurpose, programmable, clock-driven, register-based electronic device that accepts binary data as input, processes it according to instructions stored in its memory, and provides results as output. (Wikipedia.org)






Conferences related to Microprocessor

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2018 IEEE Symposium on VLSI Circuits

Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2020 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2016 IEEE Symposium on VLSI Circuits

    circuit design to address challenges of deeply scaled technologies - e.g. dfm, variability, reliability - digital circuit techniques - analog and mixed signal circuits such as data converters and amp

  • 2014 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2012 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation

  • 2011 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2010 IEEE Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies - Adaptive pow

  • 2009 Symposium on VLSI Circuits

    Circuit design to address challenges of deeply scaled technologies - e.g. DFM, variability, reliability - Digital circuit techniques - Analog and mixed signal circuits such as data converters and amplifiers to address performance, power, technology scaling, and variability - Complex SOC systems describing new architectures and implementations - Circuit approaches for clock generation and distribution - Advances in memory circuits; especially for embedded memories in scaled technologies

  • 2008 IEEE Symposium on VLSI Circuits

  • 2007 IEEE Symposium on VLSI Circuits


2017 IEEE International Solid- State Circuits Conference - (ISSCC)

The International Solid-State Circuits Conference is the foremost global forum for solid-state circuits and systems-on-a-chip. The Conference offers 5 days of technical papers and educational events related to integrated circuits, including analog, digital, data converters, memory, RF, communications, imagers, medical and MEMS IC's.


2014 IEEE Custom Integrated Circuits Conference - CICC 2014

The IEEE Custom Integrated Circuits Conference (CICC) is the premier conference devoted to IC development. CICC showcases original, first-published innovative analog and digital circuit techniques covering a broad spectrum of technical topics. It is a forum for circuit, IC and SoC designers, CAD developers, manufacturers and ASIC users. CICC is the conference to find out how to solve design problems and improve circuit design and chip design techniques.


ESSCIRC 2013 - 39th European Solid State Circuits Conference

The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits and technologies. The conference is jointly organized with ESSDERC, which covers advances in process technology and devices.

  • ESSCIRC 2012 - 38th European Solid State Circuits Conference

    The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits.

  • ESSCIRC 2011 - 37th European Solid State Circuits Conference

    he aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits. ESSCIRC and its sister conference ESSDERC, which deals with solid-state devices and technologies, are jointly organized.

  • ESSCIRC 2010 - 36th European Solid State Circuits Conference

    The aim of the ESSCIRC conference is to provide an annual European forum for the presentation and discussion of recent advances in solid-state circuits.

  • ESSCIRC 2009 - 35th European Solid State Circuits Conference

    The aim of the ESSDERC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and technologies. The aim of the ESSCIRC is to provide corresponding forum in the field of silicon design and implementation.


2012 16th IEEE International Symposium on Power Line Communications and Its Applications (ISPLC)

ISPLC 2012 will bring together academia and industry professionals as well as students and researchers to present and discuss ongoing work on existing and future power line communication (PLC) systems, PLC applications, PLC standardization activities. The contributions presented at ISPLC will span all aspects of communications over power lines, including access, home networking, in-vehicle applications, utility applications, smart grids, and more.


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Periodicals related to Microprocessor

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Computer Architecture Letters

Rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessors computer systems, computer architecture workload characterization, performance evaluation and simulation techniques, and power-aware computing


Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities. Practical applications of aids resulting in producible analog, digital, optical, or microwave integrated circuits are emphasized.


Computers, IEEE Transactions on

Design and analysis of algorithms, computer systems, and digital networks; methods for specifying, measuring, and modeling the performance of computers and computer systems; design of computer components, such as arithmetic units, data storage devices, and interface devices; design of reliable and testable digital devices and systems; computer networks and distributed computer systems; new computer organizations and architectures; applications of VLSI ...


Instrumentation and Measurement, IEEE Transactions on

Measurements and instrumentation utilizing electrical and electronic techniques.


Micro, IEEE

IEEE Micro magazine presents high-quality technical articles from designers, systems integrators, and users discussing the design, performance, or application of microcomputer and microprocessor systems. Topics include architecture, components, subassemblies, operating systems, application software, communications, fault tolerance, instrumentation, control equipment, and peripherals.


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Most published Xplore authors for Microprocessor

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Xplore Articles related to Microprocessor

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Design and Development Control System for Deep-Fertilization Variable Liquid Fertilizer Applicator

Chunling Lang; Jinwu Wang; Yeqiong Shi; Xiaohuan Xi 2011 Second International Conference on Digital Manufacturing & Automation, 2011

In order to improve Liquid fertilizer efficiency, Liquid variable fertilizing control system was designed with two working modes: a manual control and an automatic control mode. Taking the S3C44B0X microprocessor of ARM7 series as the core device, according to the fertilizing amount of the current location, the system was able to combined together for the machine speed and access to ...


A new compact control unit for CNC using SoCs technology

Kh. M. Assar; I. S. Ashour; E. M. Saad; A. M. Rashid Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442), 2003

This paper introduces a new complete design and implementation of a System on Chip (SoC) control unit for three dimensions CNC, using FPGA technology. Intelligent controlling software is designed and integrated in the system using a standard HPGL format. A new communication strategy for optimum utilization of the required integrated memory is introduced and implemented. The new SoC design has ...


Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability

T. Markas; E. Edwards; S. Wang; J. Medero; N. Kanopoulos Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

This paper presents the use of a CAD system that allows the automatic synthesis of integrated circuits with on-line, 100% error detection capability. An 8-bit CPU serves as a benchmark to demonstrate the circuit technology used to automatically synthesize this type of circuit. The paper presents results on the actual design of the benchmark circuit and the use of the ...


The most compact digital regulator for thyristor excitation of large alternators

Chen Xianming; Xu Heping; Hu Jiachun; Huang Dalu; Liu Weiqun TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on, 1993

The paper presents a new variety of the microprocessor-based excitation regulator (MPER), which has been operating on thyristor excitation systems of many large alternators. Several essential improvements significantly reducing the hardware as much as possible are introduced. The hardware elements are replaced by software elements leading to the most compact digital regulator.<>


High-performance throughput computing

S. Chaudhry; P. Caprioli; S. Yip; M. Tremblay IEEE Micro, 2005

CMT processors offer a way to significantly improve the performance of computer systems. The return on investment for multithreading is among the highest in computer microarchitectural techniques. If you design a core from scratch to support multithreading, gains as high as 3× are possible for just a 20 percent increase in area. Even with throughput performance as the main target, ...


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Educational Resources on Microprocessor

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eLearning

Design and Development Control System for Deep-Fertilization Variable Liquid Fertilizer Applicator

Chunling Lang; Jinwu Wang; Yeqiong Shi; Xiaohuan Xi 2011 Second International Conference on Digital Manufacturing & Automation, 2011

In order to improve Liquid fertilizer efficiency, Liquid variable fertilizing control system was designed with two working modes: a manual control and an automatic control mode. Taking the S3C44B0X microprocessor of ARM7 series as the core device, according to the fertilizing amount of the current location, the system was able to combined together for the machine speed and access to ...


A new compact control unit for CNC using SoCs technology

Kh. M. Assar; I. S. Ashour; E. M. Saad; A. M. Rashid Proceedings of the 12th IEEE International Conference on Fuzzy Systems (Cat. No.03CH37442), 2003

This paper introduces a new complete design and implementation of a System on Chip (SoC) control unit for three dimensions CNC, using FPGA technology. Intelligent controlling software is designed and integrated in the system using a standard HPGL format. A new communication strategy for optimum utilization of the required integrated memory is introduced and implemented. The new SoC design has ...


Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability

T. Markas; E. Edwards; S. Wang; J. Medero; N. Kanopoulos Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996

This paper presents the use of a CAD system that allows the automatic synthesis of integrated circuits with on-line, 100% error detection capability. An 8-bit CPU serves as a benchmark to demonstrate the circuit technology used to automatically synthesize this type of circuit. The paper presents results on the actual design of the benchmark circuit and the use of the ...


The most compact digital regulator for thyristor excitation of large alternators

Chen Xianming; Xu Heping; Hu Jiachun; Huang Dalu; Liu Weiqun TENCON '93. Proceedings. Computer, Communication, Control and Power Engineering.1993 IEEE Region 10 Conference on, 1993

The paper presents a new variety of the microprocessor-based excitation regulator (MPER), which has been operating on thyristor excitation systems of many large alternators. Several essential improvements significantly reducing the hardware as much as possible are introduced. The hardware elements are replaced by software elements leading to the most compact digital regulator.<>


High-performance throughput computing

S. Chaudhry; P. Caprioli; S. Yip; M. Tremblay IEEE Micro, 2005

CMT processors offer a way to significantly improve the performance of computer systems. The return on investment for multithreading is among the highest in computer microarchitectural techniques. If you design a core from scratch to support multithreading, gains as high as 3× are possible for just a 20 percent increase in area. Even with throughput performance as the main target, ...


More eLearning Resources

IEEE-USA E-Books

  • No title

    Many electrical and computer engineering projects involve some kind of embedded system in which a microcontroller sits at the center as the primary source of control. The recently-developed Arduino development platform includes an inexpensive hardware development board hosting an eight-bit ATMEL ATmega-family processor and a Java-based software-development environment. These features allow an embedded systems beginner the ability to focus their attention on learning how to write embedded software instead of wasting time overcoming the engineering CAD tools learning curve. The goal of this text is to introduce fundamental methods for creating embedded software in general, with a focus on ANSI C. The Arduino development platform provides a great means for accomplishing this task. As such, this work presents embedded software development using 100% ANSI C for the Arduino's ATmega328P processor. We deviate from using the Arduino-specific Wiring libraries in an attempt to provide the most general embedded methods. In this way, the reader will acquire essential knowledge necessary for work on future projects involving other processors. Particular attention is paid to the notorious issue of using C pointers in order to gain direct access to microprocessor registers, which ultimately allow control over all peripheral interfacing. Table of Contents: Introduction / ANSI C / Introduction to Arduino / Embedded Debugging / ATmega328P Architecture / General-Purpose Input/Output / Timer Ports / Analog Input Ports / Interrupt Processing / Serial Communications / Assembly Language / Non-volatile Memory

  • Register Files and Caches

    This chapter contains sections titled: Basic Architecture Basic SRAM Cell Design and Operation Address Path Design Read Path Design Write Path Design Redundancy Reliability Issues This chapter contains sections titled: References

  • No title

    The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

  • No title

    Since the 1970's, microprocessor-based digital platforms have been riding Moore's law, allowing for doubling of density for the same area roughly every two years. However, whereas microprocessor fabrication has focused on increasing instruction execution rate, memory fabrication technologies have focused primarily on an increase in capacity with negligible increase in speed. This divergent trend in performance between the processors and memory has led to a phenomenon referred to as the "Memory Wall." To overcome the memory wall, designers have resorted to a hierarchy of cache memory levels, which rely on the principal of memory access locality to reduce the observed memory access time and the performance gap between processors and memory. Unfortunately, important workload classes exhibit adverse memory access patterns that baffle the simple policies built into modern cache hierarchies to move instructions and data across cache levels. As such, processors of en spend much time idling upon a demand fetch of memory blocks that miss in higher cache levels. Prefetching--predicting future memory accesses and issuing requests for the corresponding memory blocks in advance of explicit accesses--is an effective approach to hide memory access latency. There have been a myriad of proposed prefetching techniques, and nearly every modern processor includes some hardware prefetching mechanisms targeting simple and regular memory access patterns. This primer offers an overview of the various classes of hardware prefetchers for instructions and data proposed in the research literature, and presents examples of techniques incorporated into modern microprocessors.

  • Design for Low Power

    This chapter contains sections titled: Minimizing Power Consumption in Digital CMOS Circuits Overview of Low-Power ULSI Circuit Techniques Multi-Level Pass-Transistor Logic for Low-Power ULSIs High Performance, Energy Efficient Master-Slave Flip-Flop Circuits Power Dissipation in the Clock System of highly pipelined ULSI CMOS Circuits Power-Delay Characteristics of CMOS Adders Delay Balanced Multipliers for Low Power/Low Voltage DSP Core Minimization of Power in VLSI Circuits Using Transistor Sizing, Input Ordering, and Statistical Power Estimation Low-Power Digital Design Power Analysis of a Programmable DSP for Architecture/Program Optimization A Review of Adiabatic Computing 2ND Order Adiabatic Computation with 2N-2P and 2N-2N2P Logic Circuits A Low-Power Microprocessor Based on Resonant Energy Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply: Experimental Results

  • CAD Tools and Test

    This book covers the design of next generation microprocessors in deep submicron CMOS technologies. The chapters in Design of High Performance Microprocessor Circuits were written by some of the world's leading technologists, designers, and researchers. All levels of system abstraction are covered, but the emphasis rests squarely on circuit design. Examples are drawn from processors designed at AMD, Digital/Compaq, IBM, Intel, MIPS, Mitsubishi, and Motorola. Each topic of this invaluable reference stands alone so the chapters can be read in any order. The following topics are covered in depth: Architectural constraints of CMOS VLSI design Technology scaling, low-power devices, SOI, and process variations Contemporary design styles including a survey of logic families, robust dynamic circuits, asynchronous logic, self-timed pipelines, and fast arithmetic units Latches, clocks and clock distribution, phase-locked and delay-locked loops Register file, cache memory, and embedded DRAM design High-speed signaling techniques and I/O design ESD, electromigration, and hot-carrier reliability CAD tools, including timing verification and the analysis of power distribution schemes Test and testability Design of High-Performance Microprocessor Circuits assumes a basic knowledge of digital circuit design and device operation, and covers a broad range of circuit styles and VLSI design techniques. Packed with practical know-how, it is an indispensable reference for practicing circuit designers, architects, system designers, CAD tool developers, process technologists, and researchers. It is also an essential text for VLSI design courses.

  • Microprocessors and Digital ICs for Control of Power Electronics and Drives

    This chapter contains sections titled: Introduction Microcomputer Control of Power Electronic Systems Microcomputer Basics Real-Time Control Using Microcomputers Microcontrollers Advanced Microprocessors for Control of Power Electronic Systems ASICS for Control of Power Electronic Systems Design of Microprocessor-Based Control Systems Development Tools Application Examples Conclusion This chapter contains sections titled: References

  • Microprocessor Examples

    This chapter includes the following topics: Clocking for Intel Microprocessors Sun Microsystems Ultrasparc-III Clocking Alpha Clocking: A Historical Overview Clocked Storage Elements in IBM Processors

  • Embedded Dram

    This chapter contains sections titled: Introduction DRAM Basis Voltage Generator Embedded DRAM This chapter contains sections titled: References

  • The Microprocessor

    This chapter contains sections titled: The Personal Computer, Xerox PARC



Standards related to Microprocessor

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IEEE Recommended Practice for Microprocessor-Based Protection Equipment Firmware Control

The scope of this recommended practice is to identify the means for timely and efficient exchange of information between manufacturers and users of protection-related equipment with respect to (1) changes in device firmware and (2) the impact of those changes. It will also include an examination of the technical and operational ramifications resulting from changes in the device firmware. Only ...


IEEE Standard for a 32-bit Microprocessor Architecture


IEEE Standard for a Versatile Backplane Bus: VMEbus


IEEE Standard for an 8-Bit Microcomputer Bus System: STD Bus


IEEE Standard for Mechanical Core Specifications for Microprocessors



Jobs related to Microprocessor

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